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| author |   Stephen Boyd <sboyd@kernel.org> | 2019-09-04 10:53:34 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-09-04 10:53:34 -0700 |
| commit | 5a85a642575c8c19e1229350bd3c767eb81fa381 (patch) | |
| tree | b87b8907e060e3cac59089181c378071c3ca1add /scripts/gdb/linux/utils.py | |
| parent | Merge tag 'clk-meson-v5.4-1' of https://github.com/BayLibre/clk-meson into clk-meson (diff) | |
| parent | clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks (diff) | |
| download | wireguard-linux-5a85a642575c8c19e1229350bd3c767eb81fa381.tar.xz wireguard-linux-5a85a642575c8c19e1229350bd3c767eb81fa381.zip | |
Merge tag 'clk-meson-v5.4-2' of https://github.com/BayLibre/clk-meson into clk-meson
Pull second set of Amlogic clk driver updates from Jerome Brunet:
- Add g12a reset support to the axg audio clock controller
- Add sm1 support to the g12a clock controller
* tag 'clk-meson-v5.4-2' of https://github.com/BayLibre/clk-meson:
clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks
clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock
clk: meson: g12a: add support for SM1 GP1 PLL
dt-bindings: clk: meson: add sm1 periph clock controller bindings
clk: meson: axg-audio: add g12a reset support
dt-bindings: clock: meson: add resets to the audio clock controller
Diffstat (limited to 'scripts/gdb/linux/utils.py')
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