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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2024-11-25 13:40:58 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-11-25 13:40:58 -0600 |
| commit | 4268106135aa2b32398a53c82e954ec0fd95551d (patch) | |
| tree | 2494fad88c1e6efc7b42fcaeea7f407fe01c6b9d /scripts/generate_rust_analyzer.py | |
| parent | Merge branch 'pci/controller/keystone' (diff) | |
| parent | PCI: mediatek-gen3: Remove unneeded semicolon (diff) | |
| download | wireguard-linux-4268106135aa2b32398a53c82e954ec0fd95551d.tar.xz wireguard-linux-4268106135aa2b32398a53c82e954ec0fd95551d.zip | |
Merge branch 'pci/controller/mediatek'
- Add support for DT 'max-link-speed' and 'num-lanes' properties to
restrict the link speed and width (AngeloGioacchino Del Regno)
* pci/controller/mediatek:
PCI: mediatek-gen3: Remove unneeded semicolon
PCI: mediatek-gen3: Add support for restricting link width
PCI: mediatek-gen3: Add support for setting max-link-speed limit
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions