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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2024-11-25 13:40:58 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-11-25 13:40:58 -0600 |
| commit | c1787c3e41e5de4c491b7bc455d752c5861753d2 (patch) | |
| tree | 8aa616f987e03d9bcc8ef62ba073b330e96e2aaf /scripts/generate_rust_analyzer.py | |
| parent | Merge branch 'pci/controller/j721e' (diff) | |
| parent | PCI: keystone: Add link up check to ks_pcie_other_map_bus() (diff) | |
| download | wireguard-linux-c1787c3e41e5de4c491b7bc455d752c5861753d2.tar.xz wireguard-linux-c1787c3e41e5de4c491b7bc455d752c5861753d2.zip | |
Merge branch 'pci/controller/keystone'
- Set the 'ti,keystone-pcie' mode so v3.65a devices work in Root Complex
mode (Kishon Vijay Abraham I)
- Try to avoid unrecoverable SError for attempts to issue config
transactions when the link is down; this is racy but the best we can do
(Kishon Vijay Abraham I)
* pci/controller/keystone:
PCI: keystone: Add link up check to ks_pcie_other_map_bus()
PCI: keystone: Set mode as Root Complex for "ti,keystone-pcie" compatible
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions