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| author |   Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2022-08-17 15:43:04 -0700 |
|---|---|---|
| committer | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2022-08-25 10:59:33 -0700 |
| commit | 6509dd1111928a351204af1fc8e6aa61e0c59002 (patch) | |
| tree | 82f6fec430b409fd76a944df51ad7b3c7d4fcee5 /scripts/generate_rust_analyzer.py | |
| parent | drm/i915/guc/slpc: Allow SLPC to use efficient frequency (diff) | |
| download | wireguard-linux-6509dd1111928a351204af1fc8e6aa61e0c59002.tar.xz wireguard-linux-6509dd1111928a351204af1fc8e6aa61e0c59002.zip | |
drm/i915: Skip Bit12 fw domain reset for gen12+
Bit12 of the Forcewake request register should not be cleared post
gen12. Do not touch this bit while clearing during fw domain reset.
v2: Tweak the comment to drop older platforms(MattR)
Bspec: 52542
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817224304.255767-1-radhakrishna.sripada@intel.com
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions