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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2023-02-16 16:20:19 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-10 17:07:08 +0100 |
| commit | 85af88b8f7d606be8a9b89fcda61a5df28a2028d (patch) | |
| tree | 550d0412b84fd6f665ef76c67f5fc5868fad7bbd /scripts/generate_rust_analyzer.py | |
| parent | clk: renesas: r8a77970: Add Z2 clock (diff) | |
| download | wireguard-linux-85af88b8f7d606be8a9b89fcda61a5df28a2028d.tar.xz wireguard-linux-85af88b8f7d606be8a9b89fcda61a5df28a2028d.zip | |
clk: renesas: r8a77980: Add Z2 clock
Add support for the Z2 (Cortex-A53 System CPU) clock on R-Car V3H, which
uses a fixed SYS-CPU divider.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/aad9eaa57acf65cbe43e4d374066a72d760d54d8.1676560357.git.geert+renesas@glider.be
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions