diff options
author | 2020-04-22 12:15:12 +0300 | |
---|---|---|
committer | 2020-04-27 13:01:12 +0300 | |
commit | 0836dacecf48a4fef6e625d4f64f9dea3a2aab8d (patch) | |
tree | 1412e2967d8a96d508cf912f6abbbb7e1020f157 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | arm64: dts: ti: k3-j721e-main: Add DSS node (diff) | |
download | wireguard-linux-0836dacecf48a4fef6e625d4f64f9dea3a2aab8d.tar.xz wireguard-linux-0836dacecf48a4fef6e625d4f64f9dea3a2aab8d.zip |
arm64: dts: ti: k3-j721e-common-proc-board: add assigned clks for DSS
The DSS related clock muxes are set via assigned-clocks in a way which
provides us:
VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions