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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2016-11-07 15:15:33 +0100 |
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| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-11-07 15:15:33 +0100 |
| commit | 1936be95e013802291201c1ed193e04fd1ed3d13 (patch) | |
| tree | 9a103bc80f1f0ea67e0ee4df0373929684d9ec9e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'rcar-rst' into clk-renesas-for-v4.10 (diff) | |
| parent | clk: renesas: Add r8a7745 CPG Core Clock Definitions (diff) | |
| download | wireguard-linux-1936be95e013802291201c1ed193e04fd1ed3d13.tar.xz wireguard-linux-1936be95e013802291201c1ed193e04fd1ed3d13.zip | |
Merge branch 'rzg-clock-defs' into clk-renesas-for-v4.10
Add r8a7743 and r8a7745 CPG Core Clock Definitions
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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