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authorDinh Nguyen <dinguyen@opensource.altera.com>2016-03-23 15:40:54 -0500
committerDinh Nguyen <dinguyen@kernel.org>2016-04-11 14:04:06 -0500
commit249ff32e1f8b6ffa92e1390e371702dd8633bcac (patch)
treee764c77406ee94ab8c446a4918b7738f1bc0e5cb /tools/perf/scripts/python/export-to-postgresql.py
parentARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry (diff)
downloadwireguard-linux-249ff32e1f8b6ffa92e1390e371702dd8633bcac.tar.xz
wireguard-linux-249ff32e1f8b6ffa92e1390e371702dd8633bcac.zip
ARM: dts: socfpga: add reset control for USB
Add the resets property for the 2 USB controllers. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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