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author | 2024-08-01 11:38:10 -0700 | |
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committer | 2024-08-08 09:19:46 -0700 | |
commit | 2d98fea7491a00dccd61fee019843b262e60f819 (patch) | |
tree | 53aa92d98b60ecd3ffc1f1b052039788b09271e6 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | riscv: dts: thead: add clock to TH1520 gpio nodes (diff) | |
download | wireguard-linux-2d98fea7491a00dccd61fee019843b262e60f819.tar.xz wireguard-linux-2d98fea7491a00dccd61fee019843b262e60f819.zip |
riscv: dts: thead: change TH1520 SPI node to use clock controller
Change the clock property in the TH1520 SPI controller node to a clock
provided by AP_SYS clock controller.
Remove spi_clk fixed clock reference from BeagleV Ahead and LPI4a dts.
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions