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| author |   Shirish S <shirish.s@amd.com> | 2020-04-02 14:40:11 +0530 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-04-03 17:21:06 -0400 |
| commit | 36a5a5816103ea96a24ac93baff8c8dc248aae1e (patch) | |
| tree | 0eaa67fea56410f9198ea6c66275a8957e5cfef5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK (diff) | |
| download | wireguard-linux-36a5a5816103ea96a24ac93baff8c8dc248aae1e.tar.xz wireguard-linux-36a5a5816103ea96a24ac93baff8c8dc248aae1e.zip | |
drm/amd/display: re-order asic declarations
Fixes build error of:
"use of undeclared identifier 'RENOIR_A0'"
To fix the same, this patch re-orders the
ASIC declarations accordingly.
Fixes: 41ef3dcd86443fa ("drm/amd/display: Fix RV2 Variant Detection")
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Zhan Liu <zhan.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions