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| author |   Stephen Boyd <sboyd@kernel.org> | 2024-01-09 11:55:47 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-01-09 11:55:47 -0800 |
| commit | 4f964cfef39d48a8e6748847df9a1ed310b96c4e (patch) | |
| tree | ef4e3c36c4b2b528dde9a29cd6dbc89a31370664 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next (diff) | |
| parent | clk: rs9: Add support for 9FGV0841 (diff) | |
| download | wireguard-linux-4f964cfef39d48a8e6748847df9a1ed310b96c4e.tar.xz wireguard-linux-4f964cfef39d48a8e6748847df9a1ed310b96c4e.zip | |
Merge branch 'clk-rs9' into clk-next
* clk-rs9:
clk: rs9: Add support for 9FGV0841
clk: rs9: Replace model check with bitshift from chip data
clk: rs9: Limit check to vendor ID in VID register
dt-bindings: clk: rs9: Add 9FGV0841
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions