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| author |   Tony Lindgren <tony@atomide.com> | 2024-02-13 12:48:52 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2024-02-26 13:08:45 +0200 |
| commit | 579856aec23150f84a64b1bde6a7ddc713d5b5cd (patch) | |
| tree | b0ce56fd2d12a4956943e117ecbdcee2f86ba539 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: ti: Improve clksel clock bit parsing for reg property (diff) | |
| download | wireguard-linux-579856aec23150f84a64b1bde6a7ddc713d5b5cd.tar.xz wireguard-linux-579856aec23150f84a64b1bde6a7ddc713d5b5cd.zip | |
ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
For the clksel clocks we are still using the legacy ti,bit-shift property
instead of the standard reg property. We can now use the reg property, so
let's do that for the clksel clocks.
To add the reg property, we switch to use #address-cells = <1>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions