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| author |   Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2016-11-01 21:12:24 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2016-11-07 15:16:17 +0100 |
| commit | 5fccac6d945b84e056b8b3b7083a151faaf2492c (patch) | |
| tree | b773639b58f4933cb9a389b63c48a4cb3212d661 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'rzg-clock-defs' into clk-renesas-for-v4.10 (diff) | |
| download | wireguard-linux-5fccac6d945b84e056b8b3b7083a151faaf2492c.tar.xz wireguard-linux-5fccac6d945b84e056b8b3b7083a151faaf2492c.zip | |
clk: renesas: r8a7796: Add CSI2 clocks
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions