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| author |   Olof Johansson <olof@lixom.net> | 2020-09-13 11:38:15 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2020-09-13 11:38:17 -0700 |
| commit | 632db90624b150aa9a33692437d3469d9272b0d5 (patch) | |
| tree | fdaa1b31a27814fac2c18afd0ac562ec2d81cafd /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'arm-soc/for-5.10/maintainers' of https://github.com/Broadcom/stblinux into arm/soc (diff) | |
| parent | ARM: brcmstb: Add debug UART entry for 72615 (diff) | |
| download | wireguard-linux-632db90624b150aa9a33692437d3469d9272b0d5.tar.xz wireguard-linux-632db90624b150aa9a33692437d3469d9272b0d5.zip | |
Merge tag 'arm-soc/for-5.10/soc' of https://github.com/Broadcom/stblinux into arm/soc
This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
- Florian adds debug UART entries for the 72164 and 72165 SoCs and
updates ARCH_BRCMSTB to select CONFIG_BCM7038_L1_IRQ which is an
interrupt controller used with the 7211 chip family
* tag 'arm-soc/for-5.10/soc' of https://github.com/Broadcom/stblinux:
ARM: brcmstb: Add debug UART entry for 72615
ARM: bcm: Enable BCM7038_L1_IRQ for ARCH_BRCMSTB
ARM: brcmstb: Add debug UART entry for 72614
Link: https://lore.kernel.org/r/20200912032153.1216354-5-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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