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author | 2025-04-12 09:08:35 +0100 | |
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committer | 2025-04-14 17:12:40 -0700 | |
commit | 17ec6dbaaed3e2447c8aac93c7161823402aa2d9 (patch) | |
tree | e1fed2bb9d9e74785aac53c51106f2f29906a168 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | net: stmmac: dwc-qos: remove tegra_eqos_init() (diff) | |
download | wireguard-linux-17ec6dbaaed3e2447c8aac93c7161823402aa2d9.tar.xz wireguard-linux-17ec6dbaaed3e2447c8aac93c7161823402aa2d9.zip |
net: stmmac: intel: remove eee_usecs_rate and hardware write
Remove the write to GMAC_1US_TIC_COUNTER for two reasons:
1. during initialisation or reinitialisation of the DWMAC core, the
core is reset, which sets this register back to its default value.
Writing it prior to stmmac_dvr_probe() has no effect.
2. Since commit 8efbdbfa9938 ("net: stmmac: Initialize
MAC_ONEUS_TIC_COUNTER register"), GMAC4/5 core code will set
this register based on the rate of plat->stmmac_clk. This clock
is created by the same code which initialises plat->eee_usecs_rate,
which is also created to run at this same rate. Since Marek's
commit, this will set this register appropriately using the
rate of this clock.
Therefore, dwmac-intel.c writing GMAC_1US_TIC_COUNTER serves no
useful purpose and can be removed.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1u3Vul-000E7m-1j@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions