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| author |   Anson Huang <anson.huang@nxp.com> | 2019-01-11 06:22:50 +0000 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-01-16 09:36:07 +0800 |
| commit | 9edf908a16c43c438f0edc08ce839c5a7ef7d039 (patch) | |
| tree | 7b625608284f336691b73034f663135f2d3c5715 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | ARM: imx: add i.MX7ULP cpuidle support (diff) | |
| download | wireguard-linux-9edf908a16c43c438f0edc08ce839c5a7ef7d039.tar.xz wireguard-linux-9edf908a16c43c438f0edc08ce839c5a7ef7d039.zip | |
ARM: imx: add i.MX7ULP SoC revision support
i.MX7ULP SoC's revision info is inside the SIM module,
bit[31:28] of JTAG_ID register defines revision as below
from B0:
0001 B0
0010 B1
This patch adds SoC revision support for i.MX7ULP, test
result as below:
root@imx7ulp-evk ~$ cat /sys/devices/soc0/revision
2.1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions