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| author |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-10 22:29:00 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-29 16:44:55 +0100 |
| commit | 3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9 (patch) | |
| tree | 7becadba99818e67a47911e9b10676112ce4442a /tools/perf/scripts/python | |
| parent | ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa (diff) | |
| download | wireguard-linux-3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9.tar.xz wireguard-linux-3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9.zip | |
ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family
The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU. The falling edge
interrupt will mostly work but it's not correct.
Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-6-krzk@kernel.org
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions