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authorMarek Vasut <marek.vasut+renesas@mailbox.org>2026-03-28 00:42:06 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-04-27 11:14:30 +0200
commit1ca2d1af3826a6de6fd300f9b122d10d21a64266 (patch)
treee7e464694ea9a22c15ee3a9bbd71d15fe3fd0ae9 /tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com
parentarm64: dts: renesas: rz-smarc-du-adv7513-smarc: Fix missing cells and reg in DU subnode (diff)
ARM: dts: renesas: r8a7778: Add missing unit address to bus node
Add missing unit address to bus node to fix the following DTC W=1 warning: arch/arm/boot/dts/renesas/r8a7778.dtsi:43.12-48.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260327234244.91707-2-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/testing/selftests/dm-verity/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions