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2025-05-19riscv: sophgo: dts: Add spi controller for SG2042Zixian Zeng1-0/+26
Add spi controllers for SG2042. SG2042 uses the upstreamed Synopsys DW SPI IP. Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Link: https://lore.kernel.org/r/20250425-sfg-spi-v6-3-2dbe7bb46013@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-19riscv: dts: sophgo: sg2042: add pinctrl supportInochi Amaoto1-0/+6
Add pinctrl node and related pin configuration for SG2042 SoC. Link: https://lore.kernel.org/r/20250211051801.470800-9-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-03-27Merge tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+9
Pull SoC devicetree updates from Arnd Bergmann: "There is new support for additional on-chip devices on Apple, Mediatek, Renesas, Rockchip, Samsung, Google, TI, ST, Nvidia and Amlogic devices. The Arm Morello reference platform gets a devicetree for booting in normal aarch64 mode. The hardware supports experimental CHERI support, which requires a modified kernel. The AMD (formerly Xilinx) Versal NET SoC gets added, this is a combined FPGA with Cortex-A78 CPUs in a SoC. Six new ST STM32MP2 SoC variants are added. Like the earlier STM32MP25, the MP211, MP213, MP215, MP231, MP233 and MP235 models are based on one or two Cortex-A35 cores but each feature a different set of I/O devices. Mediatek MT8370 is a minor variation of MT8390 with fewer CPU and GPU cores Apple T2 is the baseboard management controller on earlier Intel CPU based Macs, with 16 models now gaining initial support. All the above come with dts files for the reference boards. In addition, these boards are added for the SoCs that are already supported: - The Milk-V Jupiter board based on SpacemiT K1/M1 - NetCube Systems Kumquat board based on the 32-bit Allwinner V3s SoC - Three boards based on 32-bit stm32mp1 - 11 distinct board variants from Toradex and one from Variscite, all based on i.MX6 - Google Pixel Pro 6 phone based on gs101 (Tensor) - Three additional variants of the i.MX8MP based "Skov" board - A second variant of the i.MX95 EVK board - Two boards based on Renesas SoCs - Four boards based the Rockchip RK35xx series, plus the RK3588 'MNT Reform 2' laptop" * tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (538 commits) arm64: dts: Add gpio_intc node for Amlogic A5 SoCs arm64: dts: Add gpio_intc node for Amlogic A4 SoCs arm64: dts: hi3660: Add property for fixing CPUIdle arm64: dts: rockchip: remove ethm0_clk0_25m_out from Sige5 gmac0 arm64: dts: marvell: Use preferred node names for "simple-bus" arm64: dts: marvell: Drop unused CP11X_TYPE define arm64: dts: marvell: Move arch timer and pmu nodes to top-level arm64: dts: rockchip: Fix PWM pinctrl names arm64: dts: rockchip: fix RK3576 SCMI clock IDs dt-bindings: clock: rk3576: add SCMI clocks arm64: dts: rockchip: Fix pcie reset gpio on Orange Pi 5 Max arm64: dts: amd/seattle: Drop undocumented "spi-controller" properties arm64: dts: amd/seattle: Fix bus, mmc, and ethernet node names arm64: dts: amd/seattle: Move and simplify fixed clocks arm64: dts: amd/seattle: Base Overdrive B1 on top of B0 version arm64: dts: rockchip: Enable HDMI audio output for ArmSoM Sige7 arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C arm64: dts: rockchip: Add SDHCI controller for RK3528 arm64: dts: rockchip: Remove bluetooth node from rock-3a arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory ...
2025-02-26riscv: sophgo: dts: Add msi controller for SG2042Chen Wang1-0/+10
Add msi-controller node to dts for SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/f47c6c3f0309a543d495cb088d6c8c5750bb5647.1740535748.git.unicorn_wang@outlook.com
2025-02-08riscv: sophgo: dts: add pwm controller for SG2042 SoCChen Wang1-0/+9
SG2042 has one PWM controller, which has 4 pwm output channels. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/f376e16c0ee0cdac51bb91421d78defc0601627a.1738737617.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
2024-10-25riscv: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devicesUwe Kleine-König1-3/+3
snps,dw-apb-gpio-port is deprecated since commit ef42a8da3cf3 ("dt-bindings: gpio: dwapb: Add ngpios property support"). The respective driver supports this since commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support") which is included in Linux v5.10-rc1. This change was created using git grep -l snps,nr-gpios arch/riscv/boot/dts | xargs perl -p -i -e 's/\bsnps,nr-gpios\b/ngpios/ . Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Fixes: a508d794f86e ("riscv: sophgo: dts: add gpio controllers for SG2042 SoC") Link: https://lore.kernel.org/r/20241022091428.477697-8-u.kleine-koenig@baylibre.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02riscv: sophgo: dts: add gpio controllers for SG2042 SoCChen Wang1-0/+66
Add support for the GPIO controller of Sophgo SG2042. SG2042 uses IP from Synopsys DesignWare APB GPIO and has three GPIO controllers. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20240819080851.1954691-1-unicornxw@gmail.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-09-02riscv: sophgo: dts: add mmc controllers for SG2042 SoCChen Wang1-0/+28
SG2042 has two MMC controller, one for emmc, another for sd-card. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-09-02riscv: dts: sophgo: Add i2c device support for sg2042Inochi Amaoto1-0/+52
The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already supported by the mainline kernel. Add i2c device node for sg2042. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/IA1PR20MB49530E59974AF0FCA4FAB6DBBBB72@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-09-02riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042Inochi Amaoto1-1/+1
As all peripherals of sg2042 share the same "interrupt-parent", there is no need to use peripherals specific "interrupt-parent". Define "interrupt-parent" in the SoC level. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/IA1PR20MB49531F6DFD2F116207C1397DBBB72@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-09riscv: dts: add clock generator for Sophgo SG2042 SoCChen Wang1-1/+54
Add clock generator node to device tree for SG2042, and enable clock for uart. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Guo Ren <guoren@kernel.org>
2024-02-23riscv: dts: add resets property for uart nodeChen Wang1-0/+1
Add resets property for uart0 for completeness, although it is deasserted by default. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-02-23riscv: dts: add reset generator for Sophgo SG2042 SoCChen Wang1-0/+8
Add reset generator node to device tree for SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/r/b2f5d7cd2d3fccfc00cf4563d2dd7363b0fa2fca.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-01-26riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint formatInochi Amaoto1-32/+48
Change the timer layout in the dtb to fit the format that needed by the SBI. Fixes: 967a94a92aaa ("riscv: dts: add initial Sophgo SG2042 SoC device tree") Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-10-07riscv: dts: add initial Sophgo SG2042 SoC device treeChen Wang1-0/+325
Milk-V Pioneer motherboard is powered by SG2042. SG2042 is server grade chip with high performance, low power consumption and high data throughput. Key features: - 64 RISC-V cpu cores - 4 cores per cluster, 16 clusters on chip - More info is available at [1]. Currently only support booting into console with only uart, other features will be added soon later. Link: https://en.sophgo.com/product/introduce/sg2042.html [1] Reviewed-by: Guo Ren <guoren@kernel.org> Acked-by: Chao Wei <chao.wei@sophgo.com> Co-developed-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com> Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com> Co-developed-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>