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2023-06-21RISC-V: split early & late of_node to hartid mappingConor Dooley2-2/+22
2023-06-21RISC-V: simplify register width check in ISA string parsingConor Dooley1-8/+7
2023-06-20riscv: replace deprecated scall with ecallFangrui Song2-2/+2
2023-06-20riscv: uprobes: Restore thread.bad_causeTiezhu Yang1-0/+2
2023-06-19Merge patch series "RISC-V: Export Zba, Zbb to usermode via hwprobe"Palmer Dabbelt3-16/+56
2023-06-19RISC-V: hwprobe: Expose Zba, Zbb, and ZbsEvan Green1-7/+41
2023-06-19RISC-V: Track ISA extensions per hartEvan Green1-6/+12
2023-06-19RISC-V: Add Zba, Zbs extension probingEvan Green2-0/+4
2023-06-19RISC-V: ACPI : Fix for usage of pointers in different address spaceSunil V L1-2/+2
2023-06-19riscv: hibernation: Remove duplicate call of suspend_restore_csrsSong Shuai1-1/+0
2023-06-19riscv: hibernation: Replace jalr with jr before suspend_restore_regsSong Shuai1-2/+2
2023-06-14riscv: say disabling zicbom if no or bad riscv,cbom-block-size foundBen Dooks1-2/+2
2023-06-08Merge patch series "riscv: Add vector ISA support"Palmer Dabbelt12-41/+658
2023-06-08riscv: Add sysctl to set the default vector rule for new processesAndy Chiu1-1/+32
2023-06-08riscv: Add prctl controls for userspace vector managementAndy Chiu3-1/+123
2023-06-08riscv: hwcap: change ELF_HWCAP to a functionAndy Chiu1-0/+5
2023-06-08riscv: prevent stack corruption by reserving task_pt_regs(p) earlyGreentime Hu1-0/+2
2023-06-08riscv: signal: validate altstack to reflect VectorAndy Chiu1-0/+7
2023-06-08riscv: signal: Report signal frame size to userspace via auxvVincent Chen1-5/+15
2023-06-08riscv: signal: Add sigcontext save/restore for vectorGreentime Hu2-14/+163
2023-06-08riscv: signal: check fp-reserved words unconditionallyAndy Chiu1-27/+28
2023-06-08riscv: Add ptrace vector supportGreentime Hu1-0/+70
2023-06-08riscv: Allocate user's vector context in the first-use trapAndy Chiu2-2/+119
2023-06-08riscv: Add task switch support for vectorGreentime Hu1-0/+19
2023-06-08riscv: Introduce riscv_v_vsize to record size of Vector contextGreentime Hu4-0/+46
2023-06-08riscv: Disable Vector Instructions for kernel itselfGuo Ren2-9/+9
2023-06-08riscv: Clear vector regfile on bootupGreentime Hu1-2/+25
2023-06-08riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0Andy Chiu1-0/+4
2023-06-08riscv: Extending cpufeature.c to detect V-extensionGuo Ren1-0/+11
2023-06-06Merge patch series "riscv: allow case-insensitive ISA string parsing"Palmer Dabbelt2-19/+19
2023-06-06riscv: allow case-insensitive ISA string parsingYangyu Chen2-19/+19
2023-06-02Merge tag 'riscv-for-linus-6.4-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds1-0/+4
2023-06-01RISC-V: time.c: Add ACPI support for time_init()Sunil V L1-6/+19
2023-06-01RISC-V: cpu: Enable cpuinfo for ACPI systemsSunil V L1-8/+22
2023-06-01RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap()Sunil V L1-10/+31
2023-06-01RISC-V: only iterate over possible CPUs in ISA string parserSunil V L1-5/+10
2023-06-01RISC-V: smpboot: Add ACPI support in setup_smp()Sunil V L1-1/+71
2023-06-01RISC-V: smpboot: Create wrapper setup_smp()Sunil V L1-1/+6
2023-06-01RISC-V: ACPI: Cache and retrieve the RINTC structureSunil V L2-0/+49
2023-06-01RISC-V: Add ACPI initialization in setup_arch()Sunil V L2-0/+131
2023-06-01RISC-V: Add support to build the ACPI coreSunil V L2-0/+81
2023-06-01riscv: move sbi_init() earlier before jump_label_init()Jisheng Zhang1-1/+1
2023-05-31riscv: Fix relocatable kernels with early alternatives using -fno-pieAlexandre Ghiti1-0/+4
2023-05-18Merge tag 'probes-fixes-v6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-traceLinus Torvalds1-0/+2
2023-05-18rethook, fprobe: do not trace rethook related functionsZe Gao1-0/+2
2023-05-15riscv: Switch to hotplug core state synchronizationThomas Gleixner1-7/+7
2023-05-09riscv: Fix orphan section warnings caused by kernel/piAlexandre Ghiti2-6/+3
2023-05-05Merge tag 'riscv-for-linus-6.4-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linuxLinus Torvalds10-49/+532
2023-05-05Merge tag 'kvm-riscv-6.4-1' of https://github.com/kvm-riscv/linux into HEADPaolo Bonzini2-0/+4
2023-05-01RISC-V: include cpufeature.h in cpufeature.cConor Dooley1-0/+1