wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-06-21	clk: at91: clk-utmi: add support for parent_hw	Claudiu Beznea	1	-1/+1
2023-06-21	clk: at91: clk-system: add support for parent_hw	Claudiu Beznea	1	-2/+2
2023-06-21	clk: at91: clk-programmable: add support for parent_hw	Claudiu Beznea	1	-1/+1
2023-06-21	clk: at91: clk-peripheral: add support for parent_hw	Claudiu Beznea	1	-1/+2
2023-06-21	clk: at91: clk-master: add support for parent_hw	Claudiu Beznea	1	-2/+2
2023-06-21	clk: at91: clk-generated: add support for parent_hw	Claudiu Beznea	1	-1/+1
2023-06-21	clk: at91: clk-main: add support for parent_data/parent_hw	Claudiu Beznea	1	-3/+3
2023-01-09	clk: at91: mark ddr clocks as critical	Claudiu Beznea	1	-2/+23
2022-08-19	clk: at91: dt-compat: Hold reference returned by of_get_parent()	Liang He	1	-24/+84
2022-03-08	clk: at91: clk-master: remove dead code	Claudiu Beznea	1	-2/+1
2021-10-26	clk: at91: clk-master: add notifier for divider	Claudiu Beznea	1	-1/+1
2020-12-19	clk: at91: clk-master: re-factor master clock	Claudiu Beznea	1	-3/+12
2020-07-24	clk: at91: clk-programmable: add mux_table option	Claudiu Beznea	1	-5/+6
2020-07-24	clk: at91: clk-peripheral: add support for changeable parent rate	Claudiu Beznea	1	-1/+2
2020-07-24	clk: at91: clk-generated: add mux_table option	Claudiu Beznea	1	-2/+3
2020-07-24	clk: at91: clk-generated: pass the id of changeable parent at registration	Claudiu Beznea	1	-3/+5
2019-04-25	clk: at91: allow configuring generated PCR layout	Alexandre Belloni	1	-1/+2
2019-04-25	clk: at91: allow configuring peripheral PCR layout	Alexandre Belloni	1	-0/+9
2018-10-17	clk: at91: move DT compatibility code to its own file	Alexandre Belloni	1	-0/+961