wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-12-17	clk: versaclock3: Drop ret variable	Biju Das	1	-19/+11
2023-12-17	clk: versaclock3: Add missing space between ')' and '{'	Biju Das	1	-22/+22
2023-12-17	clk: versaclock3: Use u8 return type for get_parent() callback	Biju Das	1	-3/+3
2023-12-17	clk: versaclock3: Avoid unnecessary padding	Biju Das	1	-3/+3
2023-12-17	clk: versaclock3: Update vc3_get_div() to avoid divide by zero	Biju Das	1	-1/+1
2023-10-30	Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next	Stephen Boyd	1	-7/+1
2023-10-09	clk: versaclock3: Convert to use maple tree register cache	Mark Brown	1	-1/+1
2023-10-09	clk: versaclock3: Remove redundant _is_writeable()	Mark Brown	1	-6/+0
2023-09-11	clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum values	Biju Das	1	-8/+8
2023-09-11	clk: vc3: Fix output clock mapping	Biju Das	1	-34/+34
2023-09-11	clk: vc3: Fix 64 by 64 division	Biju Das	1	-3/+2
2023-08-01	clk: versaclock3: Switch to use i2c_driver's probe callback	Uwe Kleine-König	1	-1/+1
2023-07-19	clk: Add support for versa3 clock driver	Biju Das	1	-0/+1143