| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-05-06 | clk: sunxi-ng: h616: Add PLL derived 32KHz clock |   Andre Przywara | 1 | -1/+1 |
| 2021-01-28 | clk: sunxi-ng: Add support for the Allwinner H616 CCU | Andre Przywara | 1 | -0/+56 |
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index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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