| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-11-23 | clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw |   Samuel Holland | 1 | -0/+49 |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 |   Thomas Gleixner | 1 | -9/+1 |
| 2017-12-07 | clk: sunxi-ng: Support fixed post-dividers on MP style clocks |   Chen-Yu Tsai | 1 | -0/+24 |
| 2017-08-30 | clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching | Chen-Yu Tsai | 1 | -0/+30 |
| 2016-10-20 | clk: sunxi-ng: Rename the internal structures |   Maxime Ripard | 1 | -2/+2 |
| 2016-08-25 | clk: sunxi-ng: mux: Rename mux macro to be consistent | Maxime Ripard | 1 | -1/+1 |
| 2016-07-08 | clk: sunxi-ng: Add M-P factor clock support | Maxime Ripard | 1 | -0/+77 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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