wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2017-06-16	clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()	Stephen Boyd	1	-1/+1
2017-06-16	Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next	Stephen Boyd	21	-260/+1562
2017-06-14	Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes	Stephen Boyd	5	-4/+9
2017-06-07	clk: sunxi-ng: Move all clock types to a library	Stephen Boyd	2	-132/+22
2017-06-07	clk: sunxi-ng: a83t: Add support for A83T's PRCM	Chen-Yu Tsai	1	-0/+107
2017-06-07	clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83t	Arnd Bergmann	1	-0/+1
2017-06-07	clk: sunxi-ng: a83t: Fix audio PLL divider offset	Chen-Yu Tsai	1	-1/+1
2017-06-07	clk: sunxi-ng: a83t: Fix PLL lock status register offset	Chen-Yu Tsai	1	-1/+1
2017-06-07	clk: sunxi-ng: Add driver for A83T CCU	Chen-Yu Tsai	4	-0/+998
2017-06-07	clk: sunxi-ng: Support multiple variable pre-dividers	Chen-Yu Tsai	9	-47/+54
2017-06-07	clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()	Wei Yongjun	1	-1/+1
2017-06-07	clk: sunxi-ng: sun5i: Export video PLLs	Maxime Ripard	1	-2/+4
2017-06-07	clk: sunxi-ng: mux: Re-adjust parent rate	Maxime Ripard	1	-5/+28
2017-06-07	clk: sunxi-ng: mux: Change pre-divider application function prototype	Maxime Ripard	5	-33/+28
2017-06-07	clk: sunxi-ng: mux: split out the pre-divider computation code	Maxime Ripard	1	-12/+20
2017-06-07	clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENT	Maxime Ripard	1	-13/+1
2017-06-07	clk: sunxi-ng: div: Switch to divider_round_rate	Maxime Ripard	1	-23/+4
2017-06-07	clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate	Maxime Ripard	6	-18/+25
2017-06-07	clk: sunxi-ng: explicitly include linux/spinlock.h	Tobias Klauser	1	-0/+1
2017-06-07	clk: sunxi-ng: add support for DE2 CCU	Icenowy Zheng	4	-0/+294
2017-05-31	clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM	Chen-Yu Tsai	1	-1/+3
2017-05-31	clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM	Chen-Yu Tsai	1	-1/+3
2017-05-25	clk: sunxi-ng: sun5i: Fix ahb_bist_clk definition	Boris Brezillon	1	-1/+1
2017-05-18	clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM	Arnd Bergmann	1	-0/+1
2017-05-14	clk: sunxi-ng: v3s: Fix usb otg device reset bit	Yong Deng	1	-1/+1
2017-05-14	clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset	Chen-Yu Tsai	1	-1/+1
2017-05-10	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	17	-53/+710
2017-04-28	clk: sunxi-ng: always select CCU_GATE	Arnd Bergmann	1	-1/+1
2017-04-21	Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into HEAD	Stephen Boyd	7	-18/+17
2017-04-19	Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next	Stephen Boyd	13	-37/+695
2017-04-13	clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code	Chen-Yu Tsai	1	-2/+1
2017-04-13	clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatch	Chen-Yu Tsai	2	-3/+3
2017-04-13	clk: sunxi-ng: use 1 as fallback for minimum multiplier	Chen-Yu Tsai	4	-11/+11
2017-04-13	clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change	Chen-Yu Tsai	1	-0/+11
2017-04-13	clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks	Chen-Yu Tsai	2	-0/+61
2017-04-13	clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driver	Tobias Regnery	1	-0/+1
2017-04-13	clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLER	Tobias Regnery	1	-0/+1
2017-04-10	clk: sunxi-ng: fix PRCM CCU CLK_NUMBER value	Icenowy Zheng	1	-1/+1
2017-04-10	clk: sunxi-ng: fix PRCM CCU ir clk parent	Icenowy Zheng	1	-1/+1
2017-04-06	clk: sunxi-ng: Display index when clock registration fails	Priit Laes	1	-2/+2
2017-04-05	clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor	Chen-Yu Tsai	1	-7/+11
2017-04-05	clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks	Chen-Yu Tsai	1	-18/+52
2017-04-05	clk: sunxi-ng: mult: Support PLL lock detection	Chen-Yu Tsai	2	-0/+4
2017-04-04	clk: sunxi-ng: add support for PRCM CCUs	Icenowy Zheng	4	-0/+247
2017-03-20	clk: sunxi-ng: fix recalc_rate formula of NKMP clocks	Icenowy Zheng	1	-1/+1
2017-03-20	clk: sunxi-ng: Fix div/mult settings for osc12M on A64	Philipp Tomsich	1	-1/+1
2017-03-06	clk: sunxi-ng: sun5i: Fix mux width for csi clock	Priit Laes	1	-1/+1
2017-03-06	clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs	Peter Robinson	1	-0/+8
2017-03-06	clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver	Icenowy Zheng	3	-9/+323
2017-03-06	clk: sunxi-ng: gate: Support common pre-dividers	Chen-Yu Tsai	1	-0/+47