wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2025-09-21	clk: mediatek: Add MT8196 disp1 clock support	Laura Nao	2	-1/+171
2025-09-21	clk: mediatek: Add MT8196 disp0 clock support	Laura Nao	3	-0/+178
2025-09-21	clk: mediatek: Add MT8196 mfg clock support	Laura Nao	3	-0/+158
2025-09-21	clk: mediatek: Add MT8196 mdpsys clock support	Laura Nao	3	-0/+194
2025-09-21	clk: mediatek: Add MT8196 mcu clock support	Laura Nao	3	-0/+175
2025-09-21	clk: mediatek: Add MT8196 I2C clock support	Laura Nao	3	-0/+126
2025-09-21	clk: mediatek: Add MT8196 pextpsys clock support	Laura Nao	3	-0/+139
2025-09-21	clk: mediatek: Add MT8196 ufssys clock support	Laura Nao	3	-0/+116
2025-09-21	clk: mediatek: Add MT8196 peripheral clock support	Laura Nao	2	-1/+144
2025-09-21	clk: mediatek: Add MT8196 vlpckgen clock support	Laura Nao	2	-1/+726
2025-09-21	clk: mediatek: Add MT8196 topckgen2 clock support	Laura Nao	2	-1/+570
2025-09-21	clk: mediatek: Add MT8196 topckgen clock support	Laura Nao	2	-1/+986
2025-09-21	clk: mediatek: Add MT8196 apmixedsys clock support	Laura Nao	3	-0/+213
2025-09-21	clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro	Laura Nao	1	-0/+19
2025-09-21	clk: mediatek: clk-gate: Add ops for gates with HW voter	Laura Nao	2	-3/+71
2025-09-21	clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct	Laura Nao	1	-33/+19
2025-09-21	clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC	Laura Nao	3	-1/+114
2025-09-21	clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap()	Laura Nao	2	-0/+17
2025-09-21	clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC	Laura Nao	2	-0/+94
2025-09-21	clk: mediatek: clk-pll: Add ops for PLLs using set/clr regs and FENC	Laura Nao	2	-1/+44
2025-09-21	clk: mediatek: clk-pll: Add set/clr regs for shared PLL enable control	Laura Nao	2	-0/+8
2025-09-21	clk: mediatek: clk-mux: Do not pass flags to clk_mux_determine_rate_flags()	Chen-Yu Tsai	1	-3/+1
2025-09-21	clk: mediatek: mt7622-aud: Add missing AFE_MRGIF clock	AngeloGioacchino Del Regno	1	-0/+1
2025-09-21	clk: mediatek: mt8195-infra_ao: Fix parent for infra_ao_hdmi_26m	AngeloGioacchino Del Regno	1	-1/+1
2025-09-21	clk: bcm: rpi: Maximize V3D clock	Maíra Canal	1	-1/+5
2025-09-21	clk: bcm: rpi: Turn firmware clock on/off when preparing/unpreparing	Maíra Canal	1	-1/+55
2025-09-21	clk: bcm: rpi: Add missing logs if firmware fails	Stefan Wahren	1	-2/+8
2025-09-19	clk: spacemit: fix i2s clock	Troy Mitchell	1	-2/+26
2025-09-19	clk: spacemit: introduce pre-div for ddn clock	Troy Mitchell	3	-10/+12
2025-09-19	clk: scmi: Add duty cycle ops only when duty cycle is supported	Jacky Bai	1	-2/+9
2025-09-19	clk: keystone: sci-clk: use devm_kmemdup_array()	Raag Jadav	1	-4/+1
2025-09-19	clk: ti: am33xx: keep WKUP_DEBUGSS_CLKCTRL enabled	Matthias Schiffer	1	-0/+2
2025-09-19	clk: amlogic: fix recent code refactoring	Marek Szyprowski	1	-1/+1
2025-09-19	Merge tag 'sunxi-clk-fixes-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes	Stephen Boyd	1	-1/+1
2025-09-17	ARM: at91: remove default values for PMC_PLL_ACR	Cristian Birsan	1	-5/+2
2025-09-17	clk: at91: add ACR in all PLL settings	Cristian Birsan	5	-0/+14
2025-09-17	clk: at91: sam9x7: Add peripheral clock id for pmecc	Balamanikandan Gunasundar	1	-0/+1
2025-09-17	clk: at91: clk-master: Add check for divide by 3	Ryan Wanner	1	-0/+3
2025-09-17	clk: at91: clk-sam9x60-pll: force write to PLL_UPDT register	Nicolas Ferre	1	-36/+39
2025-09-14	clk: tegra: dfll: Add CVB tables for Tegra114	Svyatoslav Ryhel	2	-28/+132
2025-09-13	clk: sunxi-ng: add support for the A523/T527 MCU CCU	Chen-Yu Tsai	3	-0/+476
2025-09-13	clk: sunxi-ng: div: support power-of-two dividers	Chen-Yu Tsai	1	-0/+18
2025-09-13	clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clock	Chen-Yu Tsai	2	-17/+18
2025-09-12	clk: imx95-blk-ctl: Save/restore registers when RPM routines are called	Laurentiu Palcu	1	-12/+21
2025-09-12	clk: imx95-blk-ctl: Save platform data in imx95_blk_ctl structure	Laurentiu Palcu	1	-23/+13
2025-09-12	clk: renesas: r9a09g05[67]: Reduce differences	Geert Uytterhoeven	2	-6/+5
2025-09-12	clk: renesas: r9a09g047: Add USB3.0 clocks/resets	Biju Das	1	-1/+8
2025-09-12	clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init()	Yuan CHen	1	-2/+5
2025-09-11	clk: qcom: gcc-sc8280xp: drop obsolete PCIe GDSC comment	Johan Hovold	1	-4/+0
2025-09-11	clk: qcom: tcsrcc-x1e80100: Set the bi_tcxo as parent to eDP refclk	Abel Vesa	1	-0/+4