wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2025-09-03	clk: qcom: gcc: Add support for Global Clock Controller	Taniya Das	3	-0/+8626
2025-09-03	clk: qcom: clk-alpha-pll: Add support for Taycan EKO_T PLL	Taniya Das	1	-0/+6
2025-09-03	clk: qcom: rpmh: Add support for Glymur rpmh clocks	Taniya Das	1	-0/+22
2025-09-03	clk: qcom: Add TCSR clock driver for Glymur SoC	Taniya Das	3	-0/+322
2025-09-03	clk: qcom: dispcc-glymur: Add support for Display Clock Controller	Taniya Das	3	-0/+1993
2025-09-03	clk: rp1: convert from round_rate() to determine_rate()	Brian Masney	1	-25/+33
2025-09-03	clk: rp1: Implement remaining clock tree	Andrea della Porta	1	-8/+968
2025-09-03	clk: rockchip: rk3368: use clock ids for SCLK_MIPIDSI_24M	WeiHao Li	1	-1/+1
2025-08-31	clk: samsung: artpec-8: Add initial clock support for ARTPEC-8 SoC	Hakyeong Kim	2	-0/+1045
2025-08-31	clk: samsung: Add clock PLL support for ARTPEC-8 SoC	Hakyeong Kim	2	-1/+129
2025-08-31	clk: samsung: exynos990: Add DPU_BUS and CMUREF mux/div and update CLKS_NR_TOP	Denzeel Oliva	1	-1/+27
2025-08-31	clk: samsung: exynos990: Replace bogus divs with fixed-factor clocks	Denzeel Oliva	1	-7/+12
2025-08-31	clk: samsung: exynos990: Fix CMU_TOP mux/div bit widths	Denzeel Oliva	1	-9/+9
2025-08-31	clk: samsung: exynos990: Use PLL_CON0 for PLL parent muxes	Denzeel Oliva	1	-4/+11
2025-08-26	clk: spacemit: ccu_pll: convert from round_rate() to determine_rate()	Brian Masney	1	-4/+6
2025-08-26	clk: spacemit: ccu_mix: convert from round_rate() to determine_rate()	Brian Masney	1	-5/+7
2025-08-26	clk: spacemit: ccu_ddn: convert from round_rate() to determine_rate()	Brian Masney	1	-4/+7
2025-08-25	clk: renesas: r9a09g047: Add GPT clocks and resets	Biju Das	1	-0/+8
2025-08-25	clk: amlogic: naming consistency alignment	Jerome Brunet	14	-3586/+3529
2025-08-24	clk: spacemit: fix sspax_clk	Troy Mitchell	1	-4/+25
2025-08-23	clk: qcom: gcc-sdm660: Add missing LPASS/CDSP vote clocks	Nickolay Goppen	1	-0/+72
2025-08-23	clk: samsung: pll: convert from round_rate() to determine_rate()	Brian Masney	1	-14/+19
2025-08-23	clk: samsung: cpu: convert from round_rate() to determine_rate()	Brian Masney	1	-5/+7
2025-08-20	clk: renesas: r9a09g077: Add module clocks for SCI1-SCI5	Lad Prabhakar	1	-0/+25
2025-08-20	clk: renesas: rzv2h: remove round_rate() in favor of determine_rate()	Brian Masney	1	-10/+0
2025-08-20	clk: renesas: rzg2l: convert from round_rate() to determine_rate()	Brian Masney	1	-5/+4
2025-08-20	clk: renesas: r9a07g04[34]: Use tabs instead of spaces	Claudiu Beznea	2	-8/+8
2025-08-20	clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL	Claudiu Beznea	1	-66/+66
2025-08-20	clk: renesas: r9a07g044: Add MSTOP for RZ/G2L	Claudiu Beznea	2	-77/+78
2025-08-20	clk: renesas: r9a08g045: Add MSTOP for GPIO	Claudiu Beznea	1	-1/+2
2025-08-20	clk: renesas: r9a09g077: Add USB core and module clocks	Lad Prabhakar	1	-1/+3
2025-08-20	clk: renesas: r9a09g047: Add DMAC clocks and resets	Tommaso Merciai	1	-0/+19
2025-08-20	clk: renesas: r9a08g045: Add PCIe clocks and resets	Claudiu Beznea	1	-0/+19
2025-08-20	clk: renesas: r9a08g045: Add I3C clocks and resets	Wolfram Sang	1	-0/+7
2025-08-18	clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL	Icenowy Zheng	1	-22/+22
2025-08-18	clk: thead: support changing DPU pixel clock rate	Icenowy Zheng	1	-5/+58
2025-08-18	clk: thead: add support for enabling/disabling PLLs	Icenowy Zheng	1	-5/+33
2025-08-18	clk: thead: Correct parent for DPU pixel clocks	Michal Wilczynski	1	-2/+10
2025-08-18	clk: thead: th1520-ap: fix parent of padctrl0 clock	Icenowy Zheng	1	-1/+5
2025-08-18	clk: thead: th1520-ap: describe gate clocks with clk_gate	Icenowy Zheng	1	-195/+183
2025-08-18	clk: samsung: fsd: Add clk id for PCLK and PLL in CAM_CSI block	Inbaraj E	1	-14/+14
2025-08-18	clk: renesas: mstp: Add genpd OF provider at postcore_initcall()	Geert Uytterhoeven	1	-1/+19
2025-08-14	clk: clk-axi-clkgen: remove unneeded semicolon	Chen Ni	1	-1/+1
2025-08-14	clk: tegra: Remove redundant semicolons	Liao Yuanhong	1	-1/+1
2025-08-14	clk: npcm: select CONFIG_AUXILIARY_BUS	Arnd Bergmann	1	-0/+1
2025-08-14	clk: remove unneeded 'fast_io' parameter in regmap_config	Wolfram Sang	11	-11/+0
2025-08-12	clk: qcom: dispcc-sc7280: Add dispcc resets	Bjorn Andersson	1	-0/+8
2025-08-11	clk: qcom: gcc-ipq6018: rework nss_port5 clock to multiple conf	Marko Mäkelä	1	-22/+38
2025-08-11	clk: qcom: Remove double-space after assignment operator	Konrad Dybcio	18	-43/+43
2025-08-11	clk: qcom: apss-ipq5424: Add ipq5424 apss clock controller	Sricharan Ramabadhran	3	-0/+275