wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2025-07-16	clk: qcom: rpmh: convert from round_rate() to determine_rate()	Brian Masney	1	-4/+4
2025-07-16	clk: qcom: rpm: convert from round_rate() to determine_rate()	Brian Masney	1	-5/+5
2025-07-16	clk: qcom: gcc-ipq4019: convert from round_rate() to determine_rate()	Brian Masney	1	-6/+8
2025-07-16	clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver	Taniya Das	3	-0/+347
2025-07-16	clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver	Taniya Das	3	-0/+540
2025-07-16	clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver	Taniya Das	3	-0/+802
2025-07-16	clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver	Taniya Das	3	-0/+1608
2025-07-16	clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs	Taniya Das	2	-18/+175
2025-07-16	clk: qcom: gcc-ipq5018: fix GE PHY reset	George Moussalem	1	-1/+1
2025-07-16	clk: qcom: gcc-qcm2290: Set HW_CTRL_TRIGGER for video GDSC	Loic Poulain	1	-0/+1
2025-07-16	clk: qcom: ipq-cmn-pll: Add IPQ5018 SoC support	George Moussalem	1	-14/+23
2025-07-16	clk: qcom: ipq5018: keep XO clock always on	George Moussalem	1	-1/+1
2025-07-14	clk: sunxi-ng: ccu_nm: convert from round_rate() to determine_rate()	Brian Masney	1	-21/+22
2025-07-14	clk: sunxi-ng: ccu_nkmp: convert from round_rate() to determine_rate()	Brian Masney	1	-11/+12
2025-07-14	clk: sunxi-ng: ccu_nk: convert from round_rate() to determine_rate()	Brian Masney	1	-7/+7
2025-07-14	clk: sunxi-ng: ccu_gate: convert from round_rate() to determine_rate()	Brian Masney	1	-6/+8
2025-07-14	clk: sunxi-ng: v3s: Assign the de and tcon clocks to the video pll	Paul Kocialkowski	1	-2/+19
2025-07-14	clk: sunxi-ng: v3s: Fix de clock definition	Paul Kocialkowski	1	-2/+1
2025-07-13	clk: thead: th1520-ap: Correctly refer the parent of osc_12m	Yao Zi	1	-1/+8
2025-07-10	clk: rockchip: rk3568: Add PLL rate for 132MHz	Andy Yan	1	-0/+1
2025-07-08	clk: renesas: r9a08g045: Add MSTOP for coupled clocks as well	Claudiu Beznea	1	-2/+4
2025-07-08	clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPs	John Madieu	1	-0/+64
2025-07-07	PM: domains: Add flags to specify power on attach/detach	Claudiu Beznea	1	-1/+1
2025-07-07	Merge tag 'spacemit-reset-for-6.17-1' of https://github.com/spacemit-com/linux	Yixun Lan	2	-120/+120
2025-07-04	clk: spacemit: mark K1 pll1_d8 as critical	Alex Elder	2	-4/+10
2025-07-03	clk: sunxi-ng: v3s: Fix TCON clock parents	Paul Kocialkowski	1	-1/+1
2025-07-03	clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name	Paul Kocialkowski	1	-1/+1
2025-07-03	clk: sunxi-ng: v3s: Fix CSI SCLK clock name	Paul Kocialkowski	1	-5/+5
2025-07-03	clk: spacemit: define three reset-only CCUs	Alex Elder	1	-0/+24
2025-07-03	clk: spacemit: set up reset auxiliary devices	Alex Elder	2	-10/+95
2025-07-03	soc: spacemit: create a header for clock/reset registers	Alex Elder	1	-110/+1
2025-07-02	clk: renesas: r9a09g057: Add XSPI clock/reset	Lad Prabhakar	1	-3/+13
2025-07-02	clk: renesas: r9a09g056: Add XSPI clock/reset	Lad Prabhakar	2	-0/+14
2025-07-02	clk: renesas: rzv2h: Add fixed-factor module clocks with status reporting	Lad Prabhakar	2	-0/+114
2025-07-02	clk: renesas: r9a09g057: Add support for xspi mux and divider	Lad Prabhakar	1	-1/+22
2025-07-02	clk: renesas: r9a09g056: Add support for xspi mux and divider	Lad Prabhakar	1	-1/+24
2025-07-02	clk: renesas: r9a09g077: Add RIIC module clocks	Lad Prabhakar	1	-0/+3
2025-07-02	clk: renesas: r9a09g077: Add PLL2 and SDHI clock support	Lad Prabhakar	1	-1/+11
2025-07-02	clk: renesas: rzv2h: Drop redundant base pointer from pll_clk	Lad Prabhakar	1	-3/+0
2025-07-02	clk: renesas: r9a09g057: Add entries for the RSPIs	Fabrizio Castro	1	-0/+24
2025-07-02	clk: amlogic: s4: remove unused data	Jerome Brunet	1	-112/+0
2025-07-02	clk: amlogic: drop clk_regmap tables	Jerome Brunet	19	-2191/+5
2025-07-02	clk: amlogic: get regmap with clk_regmap_init	Jerome Brunet	11	-0/+89
2025-06-30	clk: clk-axi-clkgen: fix coding style issues	Nuno Sá	1	-40/+41
2025-06-30	clk: clk-axi-clkgen move to min/max()	Nuno Sá	1	-4/+4
2025-06-30	clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime	Nuno Sá	1	-1/+64
2025-06-30	clk: clk-axi-clkgen: make sure to include mod_devicetable.h	Nuno Sá	1	-0/+1
2025-06-30	clk: clk-axi-clkgen: fix fpfd_max frequency for zynq	Nuno Sá	1	-1/+1
2025-06-30	clk: thead: Mark essential bus clocks as CLK_IGNORE_UNUSED	Michal Wilczynski	1	-2/+3
2025-06-30	clk: amlogic: remove unnecessary headers	Jerome Brunet	18	-677/+530