wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2025-06-26	clk: renesas: rzv2h: Add missing include file	Fabrizio Castro	1	-0/+1
2025-06-25	clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset	Chen-Yu Tsai	1	-0/+1
2025-06-24	clk: renesas: rzv2h: Use devm_kmemdup_array()	Raag Jadav	1	-2/+2
2025-06-23	clk: amlogic: axg-audio: use the auxiliary reset driver	Jerome Brunet	2	-102/+15
2025-06-21	clk: xilinx: vcu: Update vcu init/reset sequence	Rohit Visavalia	1	-0/+29
2025-06-21	clk: xilinx: vcu: unregister pll_post only if registered correctly	Rohit Visavalia	1	-2/+2
2025-06-21	clk: ti: Simplify ti_find_clock_provider()	Rob Herring (Arm)	1	-21/+6
2025-06-20	clk: versaclock7: Constify regmap_range_cfg array	Krzysztof Kozlowski	1	-1/+1
2025-06-20	clk: stm32: Do not enable by default during compile testing	Krzysztof Kozlowski	1	-4/+4
2025-06-20	clk: nuvoton: Do not enable by default during compile testing	Krzysztof Kozlowski	1	-2/+2
2025-06-20	clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests	Jerome Brunet	3	-0/+151
2025-06-20	clk: tests: Make clk_register_clk_parent_data_device_driver() common	Jerome Brunet	1	-38/+46
2025-06-19	clk: add a clk_hw helpers to get the clock device or device_node	Jerome Brunet	1	-0/+12
2025-06-19	clk: pwm: Make use of non-sleeping PWMs	Uwe Kleine-König	1	-1/+29
2025-06-19	clk: pwm: Don't reconfigure running PWM at probe time	Uwe Kleine-König	1	-6/+0
2025-06-19	clk: pwm: Convert to use pwm_apply_might_sleep()	Uwe Kleine-König	1	-7/+9
2025-06-19	clk: pwm: Let .get_duty_cycle() return the real duty cycle	Uwe Kleine-König	1	-1/+4
2025-06-19	clk: imx: Fix an out-of-bounds access in dispmix_csr_clk_dev_data	Xiaolei Wang	1	-4/+8
2025-06-19	clk: scmi: Handle case where child clocks are initialized before their parents	Sascha Hauer	1	-8/+10
2025-06-19	clk: sophgo: Use div64* for 64-by-32 division to simplify	Pei Xiao	1	-2/+2
2025-06-19	clk: davinci: Add NULL check in davinci_lpsc_clk_register()	Henry Martin	1	-0/+5
2025-06-19	clk: apple-nco: Drop default ARCH_APPLE in Kconfig	Sven Peter	1	-1/+0
2025-06-19	clk: renesas: Add CPG/MSSR support to RZ/N2H SoC	Lad Prabhakar	4	-0/+13
2025-06-19	clk: renesas: r9a09g077: Add PCLKL core clock	Lad Prabhakar	1	-1/+2
2025-06-19	clk: renesas: r9a09g047: Add I3C0 clocks and resets	Tommaso Merciai	1	-0/+8
2025-06-18	clk: qcom: cmnpll: Add IPQ5424 SoC support	Luo Jie	1	-5/+30
2025-06-16	clk: rp1: Add support for clocks provided by RP1	Andrea della Porta	3	-0/+1504
2025-06-14	clk: sunxi-ng: a523: Mark MBUS clock as critical	Chen-Yu Tsai	1	-1/+2
2025-06-13	clk: renesas: rzv2h: Fix missing CLK_SET_RATE_PARENT flag for ddiv clocks	Lad Prabhakar	1	-0/+1
2025-06-12	clk: samsung: exynosautov920: add block hsi2 clock support	Raghav Sharma	1	-0/+72
2025-06-10	clk: qcom: camcc-sc8180x: Add SC8180X camera clock controller driver	Satya Priya Kakitapalli	3	-0/+2900
2025-06-10	clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks	Krzysztof Kozlowski	1	-5/+5
2025-06-10	clk: qcom: gcc-ipq8074: fix broken freq table for nss_port6_tx_clk_src	Christian Marangi	1	-3/+3
2025-06-10	clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's	Taniya Das	5	-9/+9
2025-06-10	clk: qcom: Add video clock controller driver for SM6350	Konrad Dybcio	3	-0/+365
2025-06-10	clk: qcom: camcc-x1e80100: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-35/+32
2025-06-10	clk: qcom: camcc-sm8650: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-41/+42
2025-06-10	clk: qcom: camcc-sm8550: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-41/+44
2025-06-10	clk: qcom: camcc-sm8450: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-45/+44
2025-06-10	clk: qcom: videocc-sm8550: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-33/+33
2025-06-10	clk: qcom: videocc-sm8450: Move PLL & clk configuration to really probe	Jagadeesh Kona	1	-33/+25
2025-06-10	clk: qcom: common: Add support to configure clk regs in qcom_cc_really_probe	Jagadeesh Kona	2	-0/+53
2025-06-10	clk: qcom: common: Handle runtime power management in qcom_cc_really_probe	Jagadeesh Kona	2	-9/+29
2025-06-10	clk: qcom: clk-alpha-pll: Add support for common PLL configuration function	Taniya Das	2	-0/+60
2025-06-10	clk: renesas: rzg2l: Rename mstp_clock to mod_clock	Geert Uytterhoeven	1	-22/+22
2025-06-10	clk: renesas: r9a09g056: Add clock and reset entries for USB2.0	Lad Prabhakar	1	-0/+10
2025-06-10	clk: renesas: rzg2l: Drop MSTOP based power domain support	Claudiu Beznea	2	-242/+17
2025-06-10	clk: renesas: r9a08g045: Drop power domain instantiation	Claudiu Beznea	1	-123/+93
2025-06-10	clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API	Claudiu Beznea	6	-266/+517
2025-06-10	clk: renesas: rzg2l: Add macro to loop through module clocks	Claudiu Beznea	1	-9/+9