aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/cxl/core
AgeCommit message (Expand)AuthorFilesLines
2026-02-02cxl/port: Move endpoint component register management to cxl_portDan Williams1-3/+3
2026-02-02cxl/port: Map Port RAS registersTerry Bowman1-0/+16
2026-02-02cxl/port: Move dport RAS setup to dport add timeDan Williams3-21/+31
2026-02-02cxl/port: Move dport probe operations to a driver eventDan Williams3-55/+27
2026-02-02cxl/port: Move decoder setup before dport creationDan Williams1-12/+21
2026-02-02cxl/port: Cleanup dport removal with a devres groupDan Williams1-10/+61
2026-02-02cxl/port: Reduce number of @dport variables in cxl_port_add_dport()Dan Williams1-15/+23
2026-02-02cxl/port: Cleanup handling of the nr_dports 0 -> 1 transitionDan Williams1-16/+15
2026-01-30Merge branch 'for-7.0/cxl-misc' into cxl-for-nextDave Jiang1-2/+1
2026-01-29cxl: Fix premature commit_end increment on decoder commit failureYuxiong Wang1-2/+1
2026-01-23Merge branch 'for-7.0/cxl-init' into cxl-for-nextDave Jiang2-59/+114
2026-01-22Merge branch 'for-7.0/cxl-aer-prep' into cxl-for-nextDave Jiang7-361/+364
2026-01-22cxl/region: Use do_div() for 64-bit modulo operationAlison Schofield1-1/+2
2026-01-22cxl/region: Translate HPA to DPA and memdev in unaligned regionsAlison Schofield1-0/+46
2026-01-22cxl/region: Translate DPA->HPA in unaligned MOD3 regionsAlison Schofield1-5/+155
2026-01-22cxl/core: Fix cxl_dport debugfs EINJ entriesCheatham, Benjamin1-3/+5
2026-01-22cxl/hdm: Fix newline character in dev_err() messagesRobert Richter1-2/+2
2026-01-22cxl: Update RAS handler interfaces to also support CXL PortsTerry Bowman3-17/+13
2026-01-22cxl/mem: Clarify @host for devm_cxl_add_nvdimm()Dan Williams1-6/+7
2026-01-22cxl/pci: Move CXL driver's RCH error handling into core/ras_rch.cTerry Bowman4-123/+125
2026-01-22cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.cDave Jiang4-186/+212
2026-01-22cxl/pci: Remove unnecessary CXL RCH handling helper functionsTerry Bowman1-14/+2
2026-01-22cxl/pci: Remove unnecessary CXL Endpoint handling helper functionsTerry Bowman1-18/+8
2026-01-22PCI: Update CXL DVSEC definitionsTerry Bowman2-36/+36
2026-01-14ACPI: extlog: Trace CPER CXL Protocol Error SectionFabio M. De Francesco1-1/+2
2026-01-13cxl: Check for invalid addresses returned from translation functions on errorsRobert Richter2-9/+27
2026-01-12cxl/hdm: Fix potential infinite loop in __cxl_dpa_reserve()Li Ming1-1/+1
2026-01-09cxl/port: Fix target list setup for multiple decoders sharing the same dportRobert Richter1-1/+1
2026-01-05cxl/region: fix format string for resource_size_tArnd Bergmann1-1/+1
2026-01-05cxl/mem: Introduce cxl_memdev_attach for CXL-dependent operationDan Williams1-4/+29
2026-01-05cxl/mem: Drop @host argument to devm_cxl_add_memdev()Dan Williams1-2/+1
2026-01-05cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanupDan Williams1-26/+44
2026-01-05cxl/mem: Arrange for always-synchronous memdev attachDan Williams1-3/+7
2026-01-05cxl/mem: Fix devm_cxl_memdev_edac_release() confusionDan Williams2-28/+37
2025-12-05Merge tag 'soc-drivers-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-1/+4
2025-12-04Merge tag 'cxl-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds5-178/+228
2025-11-27Merge tag 'cache-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers-lateArnd Bergmann1-1/+4
2025-11-17memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion()Yicong Yang1-1/+4
2025-11-17memregion: Drop unused IORES_DESC_* parameter from cpu_cache_invalidate_memregion()Jonathan Cameron1-1/+1
2025-11-14Merge branch 'for-6.19/cxl-prm' into cxl-for-nextDave Jiang2-19/+7
2025-11-14cxl/region: Remove local variable @inc in cxl_port_setup_targets()Robert Richter1-3/+2
2025-11-14cxl: Simplify cxl_rd_ops allocation and handlingRobert Richter2-16/+5
2025-11-13Merge branch 'for-6.19/cxl-elc' into cxl-for-nextDave Jiang1-15/+44
2025-11-13Merge branch 'for-6.19/cxl-addr-xlat' into cxl-for-nextDave Jiang1-60/+142
2025-11-12cxl: Clarify comment in spa_maps_hpa()Dave Jiang1-3/+3
2025-11-12cxl: Rename region_res_match_cxl_range() to spa_maps_hpa()Dave Jiang1-5/+5
2025-11-12cxl: Add handling of locked CXL decoderDave Jiang2-0/+22
2025-11-07cxl: Adjust offset calculation for poison injectionDave Jiang1-0/+2
2025-11-03cxl/region: Add support to indicate region has extended linear cacheDave Jiang1-15/+44
2025-11-03cxl/region: Refactor address translation funcs for testingAlison Schofield1-60/+142
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.