Add a cortex bus which represents the ARM MPCore Complex.

It will attach only to ARM Cortex A9 and A15 SoCs.
The generic interrupt controller and timer will attach to this bus,
later a secondary cache controller can be added.
The base address for those controllers are figured out using
the periphbase register.

ok bmercer@

11 files changed, 271 insertions, 71 deletions

diff --git a/sys/arch/arm/conf/files.arm b/sys/arch/arm/conf/files.arm
index 91af6829041..e358311f16e 100644
--- a/sys/arch/arm/conf/files.arm
+++ b/sys/arch/arm/conf/files.arm
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.arm,v 1.23 2013/04/30 13:10:45 patrick Exp $
+#	$OpenBSD: files.arm,v 1.24 2013/05/01 00:16:26 patrick Exp $
 #	$NetBSD: files.arm,v 1.76 2003/11/05 12:53:15 scw Exp $
 
 # generic networking files
@@ -20,6 +20,8 @@ device	mainbus {}
 attach	mainbus at root
 file	arch/arm/mainbus/mainbus.c		mainbus
 
+include "arch/arm/cortex/files.cortex"
+
 device	cpu {}
 attach	cpu at mainbus with cpu_mainbus
 file	arch/arm/mainbus/cpu_mainbus.c		cpu_mainbus
diff --git a/sys/arch/beagle/dev/ampintc.c b/sys/arch/arm/cortex/ampintc.c
index 0a37fcdb868..275a979fbd9 100644
--- a/sys/arch/beagle/dev/ampintc.c
+++ b/sys/arch/arm/cortex/ampintc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ampintc.c,v 1.11 2013/04/26 00:09:14 patrick Exp $ */
+/* $OpenBSD: ampintc.c,v 1.1 2013/05/01 00:16:26 patrick Exp $ */
 /*
  * Copyright (c) 2007,2009,2011 Dale Rahn <drahn@openbsd.org>
  *
@@ -28,7 +28,13 @@
 #include <sys/evcount.h>
 #include <arm/cpufunc.h>
 #include <machine/bus.h>
-#include <beagle/dev/omapvar.h>
+#include <arm/cortex/cortex.h>
+
+/* offset from periphbase */
+#define ICP_ADDR	0x100
+#define ICP_SIZE	0x100
+#define ICD_ADDR	0x1000
+#define ICD_SIZE	0x1000
 
 /* registers */
 #define	ICD_DCR			0x000
@@ -192,7 +198,7 @@ void
 ampintc_attach(struct device *parent, struct device *self, void *args)
 {
 	struct ampintc_softc *sc = (struct ampintc_softc *)self;
-	struct omap_attach_args *oa = args;
+	struct cortex_attach_args *ia = args;
 	int i, nintr;
 	bus_space_tag_t		iot;
 	bus_space_handle_t	d_ioh, p_ioh;
@@ -201,14 +207,14 @@ ampintc_attach(struct device *parent, struct device *self, void *args)
 
 	arm_init_smask();
 
-	iot = oa->oa_iot;
+	iot = ia->ca_iot;
 
-	if (bus_space_map(iot, oa->oa_dev->mem[0].addr,
-	    oa->oa_dev->mem[0].size, 0, &p_ioh))
+	if (bus_space_map(iot, ia->ca_periphbase + ICP_ADDR,
+	    ICP_SIZE, 0, &p_ioh))
 		panic("ampintc_attach: ICP bus_space_map failed!");
 
-	if (bus_space_map(iot, oa->oa_dev->mem[1].addr,
-	    oa->oa_dev->mem[1].size, 0, &d_ioh))
+	if (bus_space_map(iot, ia->ca_periphbase + ICD_ADDR,
+	    ICD_SIZE, 0, &d_ioh))
 		panic("ampintc_attach: ICD bus_space_map failed!");
 
 	sc->sc_iot = iot;
diff --git a/sys/arch/beagle/dev/amptimer.c b/sys/arch/arm/cortex/amptimer.c
index c09bed24de6..8e635c9f1df 100644
--- a/sys/arch/beagle/dev/amptimer.c
+++ b/sys/arch/arm/cortex/amptimer.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: amptimer.c,v 1.8 2013/04/26 00:09:14 patrick Exp $ */
+/* $OpenBSD: amptimer.c,v 1.1 2013/05/01 00:16:26 patrick Exp $ */
 /*
  * Copyright (c) 2011 Dale Rahn <drahn@openbsd.org>
  *
@@ -27,21 +27,25 @@
 #include <arm/cpufunc.h>
 #include <machine/bus.h>
 #include <machine/intr.h>
-#include <beagle/dev/omapvar.h>
+#include <arm/cortex/cortex.h>
+
+/* offset from periphbase */
+#define GTIMER_ADDR	0x200
+#define GTIMER_SIZE	0x100
 
 /* registers */
-#define GTIMER_CNT_LOW		0x200
-#define GTIMER_CNT_HIGH		0x204
-#define GTIMER_CTRL		0x208
+#define GTIMER_CNT_LOW		0x00
+#define GTIMER_CNT_HIGH		0x04
+#define GTIMER_CTRL		0x08
 #define GTIMER_CTRL_AA		(1 << 3)
 #define GTIMER_CTRL_IRQ		(1 << 2)
 #define GTIMER_CTRL_COMP	(1 << 1)
 #define GTIMER_CTRL_TIMER	(1 << 0)
-#define GTIMER_STATUS		0x20c
+#define GTIMER_STATUS		0x0c
 #define GTIMER_STATUS_EVENT	(1 << 0)
-#define GTIMER_CMP_LOW		0x210
-#define GTIMER_CMP_HIGH		0x214
-#define GTIMER_AUTOINC		0x218
+#define GTIMER_CMP_LOW		0x10
+#define GTIMER_CMP_HIGH		0x14
+#define GTIMER_AUTOINC		0x18
 
 #define TIMER_FREQUENCY		500 * 1000 * 1000 /* ARM core clock */
 int32_t amptimer_frequency = TIMER_FREQUENCY;
@@ -123,13 +127,13 @@ void
 amptimer_attach(struct device *parent, struct device *self, void *args)
 {
 	struct amptimer_softc *sc = (struct amptimer_softc *)self;
-	struct omap_attach_args *oa = args;
+	struct cortex_attach_args *ia = args;
 	bus_space_handle_t ioh;
 
-	sc->sc_iot = oa->oa_iot;
+	sc->sc_iot = ia->ca_iot;
 
-	if (bus_space_map(sc->sc_iot, oa->oa_dev->mem[0].addr,
-	    oa->oa_dev->mem[0].size, 0, &ioh))
+	if (bus_space_map(sc->sc_iot, ia->ca_periphbase + GTIMER_ADDR,
+	    GTIMER_SIZE, 0, &ioh))
 		panic("amptimer_attach: bus_space_map failed!");
 
 	sc->sc_ticks_per_second = amptimer_frequency;
diff --git a/sys/arch/arm/cortex/cortex.c b/sys/arch/arm/cortex/cortex.c
new file mode 100644
index 00000000000..d01c4ddb040
--- /dev/null
+++ b/sys/arch/arm/cortex/cortex.c
@@ -0,0 +1,158 @@
+/*	$OpenBSD: cortex.c,v 1.1 2013/05/01 00:16:26 patrick Exp $	*/
+/* $NetBSD: mainbus.c,v 1.3 2001/06/13 17:52:43 nathanw Exp $ */
+
+/*
+ * Copyright (c) 1994,1995 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Brini.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * mainbus.c
+ *
+ * mainbus configuration
+ *
+ * Created      : 15/12/94
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#define _ARM32_BUS_DMA_PRIVATE
+#include <machine/bus.h>
+#include <arm/cpufunc.h>
+#include <arm/armv7/armv7var.h>
+#include <arm/cortex/cortex.h>
+
+struct arm32_bus_dma_tag cortex_bus_dma_tag = {
+	0,
+	0,
+	NULL,
+	_bus_dmamap_create,
+	_bus_dmamap_destroy,
+	_bus_dmamap_load,
+	_bus_dmamap_load_mbuf,
+	_bus_dmamap_load_uio,
+	_bus_dmamap_load_raw,
+	_bus_dmamap_unload,
+	_bus_dmamap_sync,
+	_bus_dmamem_alloc,
+	_bus_dmamem_free,
+	_bus_dmamem_map,
+	_bus_dmamem_unmap,
+	_bus_dmamem_mmap,
+};
+
+/* Prototypes for functions provided */
+
+int  cortexmatch(struct device *, void *, void *);
+void cortexattach(struct device *, struct device *, void *);
+int  cortexprint(void *aux, const char *cortex);
+int cortexsearch(struct device *,  void *, void *);
+
+/* attach and device structures for the device */
+
+struct cfattach cortex_ca = {
+	sizeof(struct device), cortexmatch, cortexattach, NULL,
+	config_activate_children
+};
+
+struct cfdriver cortex_cd = {
+	NULL, "cortex", DV_DULL
+};
+
+/*
+ * int cortexmatch(struct device *parent, struct cfdata *cf, void *aux)
+ */
+
+int
+cortexmatch(struct device *parent, void *cf, void *aux)
+{
+	int cputype = cpufunc_id();
+
+	if ((cputype & CPU_ID_CORTEX_A9_MASK) == CPU_ID_CORTEX_A9 ||
+	    (cputype & CPU_ID_CORTEX_A15_MASK) == CPU_ID_CORTEX_A15) {
+		if (armv7_periphbase())
+			return (1);
+	}
+
+	return (0);
+}
+
+/*
+ * void cortexattach(struct device *parent, struct device *self, void *aux)
+ *
+ * probe and attach all children
+ */
+
+void
+cortexattach(struct device *parent, struct device *self, void *aux)
+{
+	printf("\n");
+
+	config_search(cortexsearch, self, aux);
+}
+
+int
+cortexsearch(struct device *parent, void *vcf, void *aux)
+{
+	struct cortex_attach_args ca;
+	struct cfdata *cf = vcf;
+
+	ca.ca_name = cf->cf_driver->cd_name;
+	ca.ca_iot = &armv7_bs_tag;
+	ca.ca_dmat = &cortex_bus_dma_tag;
+	ca.ca_periphbase = armv7_periphbase();
+
+	/* allow for devices to be disabled in UKC */
+	if ((*cf->cf_attach->ca_match)(parent, cf, &ca) == 0)
+		return 0;
+
+	config_attach(parent, cf, &ca, cortexprint);
+	return 1;
+}
+
+/*
+ * int cortexprint(void *aux, const char *cortex)
+ *
+ * print routine used during config of children
+ */
+
+int
+cortexprint(void *aux, const char *cortex)
+{
+	struct cortex_attach_args *ca = aux;
+
+	if (cortex != NULL)
+		printf("%s at %s", ca->ca_name, cortex);
+
+	return (UNCONF);
+}
diff --git a/sys/arch/arm/cortex/cortex.h b/sys/arch/arm/cortex/cortex.h
new file mode 100644
index 00000000000..928cdd4e347
--- /dev/null
+++ b/sys/arch/arm/cortex/cortex.h
@@ -0,0 +1,54 @@
+/*	$OpenBSD: cortex.h,v 1.1 2013/05/01 00:16:26 patrick Exp $	*/
+/* $NetBSD: mainbus.h,v 1.1 2001/02/24 19:38:02 reinoud Exp $ */
+
+/*
+ * Copyright (c) 1994,1995 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Brini.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * mainbus.h
+ *
+ * mainbus configuration
+ *
+ * Created      : 15/12/94
+ */
+
+/*
+ * cortex driver attach arguments
+ */
+
+struct cortex_attach_args {
+	char *ca_name;
+	bus_space_tag_t ca_iot;
+	bus_dma_tag_t ca_dmat;
+	uint32_t ca_periphbase;
+};
diff --git a/sys/arch/arm/cortex/files.cortex b/sys/arch/arm/cortex/files.cortex
new file mode 100644
index 00000000000..bf4eca15c2c
--- /dev/null
+++ b/sys/arch/arm/cortex/files.cortex
@@ -0,0 +1,14 @@
+#	$OpenBSD: files.cortex,v 1.1 2013/05/01 00:16:26 patrick Exp $
+
+# ARM core
+device	cortex {}
+attach	cortex at mainbus
+file	arch/arm/cortex/cortex.c		cortex
+
+device	ampintc
+attach	ampintc at cortex
+file	arch/arm/cortex/ampintc.c		ampintc
+
+device	amptimer
+attach	amptimer at cortex
+file	arch/arm/cortex/amptimer.c		amptimer
diff --git a/sys/arch/beagle/conf/GENERIC b/sys/arch/beagle/conf/GENERIC
index 0091213821d..c71ef541ddf 100644
--- a/sys/arch/beagle/conf/GENERIC
+++ b/sys/arch/beagle/conf/GENERIC
@@ -1,4 +1,4 @@
-# $OpenBSD: GENERIC,v 1.14 2012/09/27 14:01:35 jsg Exp $
+# $OpenBSD: GENERIC,v 1.15 2013/05/01 00:16:26 patrick Exp $
 #
 # GENERIC machine description file
 #
@@ -57,8 +57,9 @@ cpu0		at mainbus?
 omap0		at mainbus?
 
 # Cortex-A9 (OMAP4)
-ampintc*	at soc? 
-amptimer*	at soc?
+cortex0		at mainbus?
+ampintc*	at cortex?
+amptimer*	at cortex?
 
 # OMAP3 only
 intc*		at soc?			# interrupt controller
diff --git a/sys/arch/beagle/conf/RAMDISK b/sys/arch/beagle/conf/RAMDISK
index 15a1a6dfcbc..3abc26e2133 100644
--- a/sys/arch/beagle/conf/RAMDISK
+++ b/sys/arch/beagle/conf/RAMDISK
@@ -1,4 +1,4 @@
-# $OpenBSD: RAMDISK,v 1.16 2012/09/27 14:01:35 jsg Exp $
+# $OpenBSD: RAMDISK,v 1.17 2013/05/01 00:16:26 patrick Exp $
 #
 # GENERIC machine description file
 #
@@ -62,8 +62,9 @@ cpu0		at mainbus?
 omap0		at mainbus?
 
 # Cortex-A9 (OMAP4)
-ampintc*	at soc? 
-amptimer*	at soc?
+cortex0		at mainbus?
+ampintc*	at cortex?
+amptimer*	at cortex?
 
 # OMAP3 only
 intc*		at soc?			# interrupt controller
diff --git a/sys/arch/beagle/conf/files.beagle b/sys/arch/beagle/conf/files.beagle
index 767b6db7b69..f06e588381b 100644
--- a/sys/arch/beagle/conf/files.beagle
+++ b/sys/arch/beagle/conf/files.beagle
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.beagle,v 1.12 2013/03/27 17:33:13 patrick Exp $
+#	$OpenBSD: files.beagle,v 1.13 2013/05/01 00:16:26 patrick Exp $
 #
 # First try for arm-specific configuration info
 #
@@ -32,15 +32,6 @@ file	arch/beagle/dev/omap.c			omap
 file	arch/beagle/dev/omap3.c			omap
 file	arch/beagle/dev/omap4.c			omap
 
-# cortex based peripherals
-device ampintc
-attach ampintc at soc
-file	arch/beagle/dev/ampintc.c		ampintc
-
-device amptimer
-attach amptimer at soc
-file	arch/beagle/dev/amptimer.c		amptimer
-
 include "dev/sdmmc/files.sdmmc"
 
 device ommmc: sdmmcbus
diff --git a/sys/arch/beagle/dev/omap.c b/sys/arch/beagle/dev/omap.c
index 62e6ac8557b..371c8edd80e 100644
--- a/sys/arch/beagle/dev/omap.c
+++ b/sys/arch/beagle/dev/omap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: omap.c,v 1.4 2013/04/25 23:07:17 patrick Exp $ */
+/* $OpenBSD: omap.c,v 1.5 2013/05/01 00:16:26 patrick Exp $ */
 /*
  * Copyright (c) 2005,2008 Dale Rahn <drahn@openbsd.com>
  *
@@ -84,8 +84,6 @@ struct board_dev overo_devs[] = {
 };
 
 struct board_dev pandaboard_devs[] = {
-	{ "ampintc",	0 },
-	{ "amptimer",	0 },
 	{ "omdog",	0 },
 	{ "omgpio",	0 },
 	{ "omgpio",	1 },
diff --git a/sys/arch/beagle/dev/omap4.c b/sys/arch/beagle/dev/omap4.c
index e2b6779a7fa..c3853354cdd 100644
--- a/sys/arch/beagle/dev/omap4.c
+++ b/sys/arch/beagle/dev/omap4.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: omap4.c,v 1.6 2013/04/25 23:07:17 patrick Exp $ */
+/* $OpenBSD: omap4.c,v 1.7 2013/05/01 00:16:26 patrick Exp $ */
 
 /*
  * Copyright (c) 2011 Uwe Stuehler <uwe@openbsd.org>
@@ -24,14 +24,6 @@
 
 #include <beagle/dev/omapvar.h>
 
-#define ICP_ADDR	0x48240100
-#define ICP_SIZE	0x100
-#define ICD_ADDR	0x48241000
-#define ICD_SIZE	0x1000
-
-#define GTIMER_ADDR	0x48240000
-#define GTIMER_SIZE	0x300
-
 #define WD_ADDR		0x4a314000
 #define WD_SIZE		0x80
 
@@ -68,27 +60,6 @@
 struct omap_dev omap4_devs[] = {
 
 	/*
-	 * Cortex-A9 Interrupt Controller
-	 */
-
-	{ .name = "ampintc",
-	  .unit = 0,
-	  .mem = {
-	    { ICP_ADDR, ICD_SIZE },
-	    { ICD_ADDR, ICD_SIZE },
-	  },
-	},
-
-	/*
-	 * Cortex-A9 Global Timer
-	 */
-
-	{ .name = "amptimer",
-	  .unit = 0,
-	  .mem = { { GTIMER_ADDR, GTIMER_SIZE } },
-	},
-
-	/*
 	 * GPIO
 	 */