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author | 2019-08-17 08:27:43 +0000 | |
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committer | 2019-08-17 08:27:43 +0000 | |
commit | 02e745c2a82d5ab44b1fcf66691e1fd3845a92f6 (patch) | |
tree | 08ab0d84dfdcce162565d0f4825207941bf614c8 | |
parent | drm: silence variable 'conn' set but not used (diff) | |
download | wireguard-openbsd-02e745c2a82d5ab44b1fcf66691e1fd3845a92f6.tar.xz wireguard-openbsd-02e745c2a82d5ab44b1fcf66691e1fd3845a92f6.zip |
drm/i915: Fix wrong escape clock divisor init for GLK
From Stanislav Lisovskiy
edc388566a1d25f88e631bd8170462d4f86c5a24 in linux 4.19.y/4.19.67
73a0ff0b30af79bf0303d557eb82f1d1945bb6ee in mainline linux
-rw-r--r-- | sys/dev/pci/drm/i915/vlv_dsi_pll.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/i915/vlv_dsi_pll.c b/sys/dev/pci/drm/i915/vlv_dsi_pll.c index a132a8037ec..77df7903e07 100644 --- a/sys/dev/pci/drm/i915/vlv_dsi_pll.c +++ b/sys/dev/pci/drm/i915/vlv_dsi_pll.c @@ -413,8 +413,8 @@ static void glk_dsi_program_esc_clock(struct drm_device *dev, else txesc2_div = 10; - I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK); - I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK); + I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) & GLK_TX_ESC_CLK_DIV1_MASK); + I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) & GLK_TX_ESC_CLK_DIV2_MASK); } /* Program BXT Mipi clocks and dividers */ |