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authordlg <dlg@openbsd.org>2015-02-18 09:57:33 +0000
committerdlg <dlg@openbsd.org>2015-02-18 09:57:33 +0000
commit03d02eb87db3d91c8fd3fdfc2a603998296fc5d1 (patch)
treefc5f26fc495ff9a2e5f6a9a8557cb50167d6ef82
parentRemove old cruft, that make no sense at all on OpenBSD. (diff)
downloadwireguard-openbsd-03d02eb87db3d91c8fd3fdfc2a603998296fc5d1.tar.xz
wireguard-openbsd-03d02eb87db3d91c8fd3fdfc2a603998296fc5d1.zip
enable pcie relaxed transaction ordering and bump the max payload
size up to 4k. found while reading someone elses driver.
-rw-r--r--sys/dev/pci/if_myx.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/sys/dev/pci/if_myx.c b/sys/dev/pci/if_myx.c
index fd750c68b42..6b311809261 100644
--- a/sys/dev/pci/if_myx.c
+++ b/sys/dev/pci/if_myx.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_myx.c,v 1.72 2014/12/22 02:28:52 tedu Exp $ */
+/* $OpenBSD: if_myx.c,v 1.73 2015/02/18 09:57:33 dlg Exp $ */
/*
* Copyright (c) 2007 Reyk Floeter <reyk@openbsd.org>
@@ -166,6 +166,7 @@ struct myx_softc {
int myx_match(struct device *, void *, void *);
void myx_attach(struct device *, struct device *, void *);
+int myx_pcie_dc(struct myx_softc *, struct pci_attach_args *);
int myx_query(struct myx_softc *sc, char *, size_t);
u_int myx_ether_aton(char *, u_int8_t *, u_int);
void myx_attachhook(void *);
@@ -332,6 +333,9 @@ myx_attach(struct device *parent, struct device *self, void *aux)
0, 0, 0, "myxbufs", &pool_allocator_nointr);
}
+ if (myx_pcie_dc(sc, pa) != 0)
+ printf("%s: unable to configure PCI Express\n", DEVNAME(sc));
+
if (mountroothook_establish(myx_attachhook, sc) == NULL) {
printf("%s: unable to establish mountroot hook\n", DEVNAME(sc));
goto unmap;
@@ -344,6 +348,29 @@ myx_attach(struct device *parent, struct device *self, void *aux)
sc->sc_mems = 0;
}
+int
+myx_pcie_dc(struct myx_softc *sc, struct pci_attach_args *pa)
+{
+ pcireg_t dcsr;
+ pcireg_t mask = PCI_PCIE_DCSR_MPS | PCI_PCIE_DCSR_ERO;
+ pcireg_t dc = ((fls(4096) - 8) << 12) | PCI_PCIE_DCSR_ERO;
+ int reg;
+
+ if (pci_get_capability(sc->sc_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
+ &reg, NULL) == 0)
+ return (-1);
+
+ reg += PCI_PCIE_DCSR;
+ dcsr = pci_conf_read(sc->sc_pc, pa->pa_tag, reg);
+ if ((dcsr & mask) != dc) {
+ CLR(dcsr, mask);
+ SET(dcsr, dc);
+ pci_conf_write(sc->sc_pc, pa->pa_tag, reg, dcsr);
+ }
+
+ return (0);
+}
+
u_int
myx_ether_aton(char *mac, u_int8_t *lladdr, u_int maxlen)
{