diff options
| author |   dlg <dlg@openbsd.org> | 2007-07-03 01:08:36 +0000 |
|---|---|---|
| committer | dlg <dlg@openbsd.org> | 2007-07-03 01:08:36 +0000 |
| commit | 0a401816d00e02c6f934c931ad73c470876f5022 (patch) | |
| tree | 9e80ed6779c6df8315aa0c469488ec54ecfb2ff6 | |
| parent | Rename rcs_diffreg() to diffreg(). (diff) | |
| download | wireguard-openbsd-0a401816d00e02c6f934c931ad73c470876f5022.tar.xz wireguard-openbsd-0a401816d00e02c6f934c931ad73c470876f5022.zip | |
do not blindly configure everything to sit on function 0. jmicron tell me
that some vendors will ship their chip with two functions enabled, so now
the code will only configure the functionality that is enabled on the
current function. two function setups will now work as the oem intended.
requested by kettenis@
| -rw-r--r-- | sys/dev/pci/jmb.c | 79 |
1 files changed, 41 insertions, 38 deletions
diff --git a/sys/dev/pci/jmb.c b/sys/dev/pci/jmb.c index 6eac8ddecaa..bc79ce7f306 100644 --- a/sys/dev/pci/jmb.c +++ b/sys/dev/pci/jmb.c @@ -1,4 +1,4 @@ -/* $OpenBSD: jmb.c,v 1.5 2007/07/02 23:50:15 dlg Exp $ */ +/* $OpenBSD: jmb.c,v 1.6 2007/07/03 01:08:36 dlg Exp $ */ /* * Copyright (c) 2007 David Gwynne <dlg@openbsd.org> @@ -108,44 +108,47 @@ jmb_attach(struct device *parent, struct device *self, void *aux) int sata = 0, pata = 0; ctl0 = pci_conf_read(pa->pa_pc, pa->pa_tag, JM_PCI_CTL0); - ctl0 &= ~(JM_PCI_CTL0_PCIIDE_F1 | JM_PCI_CTL0_AHCI_EN | - JM_PCI_CTL0_AHCI_F1 | JM_PCI_CTL0_SATA0_IDE | - JM_PCI_CTL0_SATA0_AHCI | JM_PCI_CTL0_SATA1_IDE | - JM_PCI_CTL0_SATA1_AHCI | JM_PCI_CTL0_F1_SUBCLASS_M | - JM_PCI_CTL0_F0_SUBCLASS_M | JM_PCI_CTL0_PCIIDE_CS | - JM_PCI_CTL0_IDEDMA_CFG); - ctl5 = pci_conf_read(pa->pa_pc, pa->pa_tag, JM_PCI_CTL5); - ctl5 &= ~JM_PCI_CTL5_PATA1_PRI; - - switch (PCI_PRODUCT(pa->pa_id)) { - case PCI_PRODUCT_JMICRON_JMB360: - case PCI_PRODUCT_JMICRON_JMB362: - /* set to single function AHCI mode */ - ctl0 |= JM_PCI_CTL0_AHCI_EN | JM_PCI_CTL0_SATA0_AHCI | - JM_PCI_CTL0_SATA1_AHCI | - JM_PCI_CTL0_F0_SUBCLASS(JM_PCI_CTL0_SUBCLASS_IDE); - sata = 1; - break; - - case PCI_PRODUCT_JMICRON_JMB366: - case PCI_PRODUCT_JMICRON_JMB365: - /* wire the second PATA port in the right place */ - ctl5 |= JM_PCI_CTL5_PATA1_PRI; - /* FALLTHROUGH */ - case PCI_PRODUCT_JMICRON_JMB363: - case PCI_PRODUCT_JMICRON_JMB361: - /* enable AHCI */ - ctl0 |= JM_PCI_CTL0_AHCI_EN | - JM_PCI_CTL0_SATA0_AHCI | JM_PCI_CTL0_SATA1_AHCI | - JM_PCI_CTL0_PCIIDE_CS | JM_PCI_CTL0_IDEDMA_CFG | - JM_PCI_CTL0_F0_SUBCLASS(JM_PCI_CTL0_SUBCLASS_AHCI); - sata = pata = 1; - break; - case PCI_PRODUCT_JMICRON_JMB368: - ctl0 |= JM_PCI_CTL0_PCIIDE_CS | JM_PCI_CTL0_IDEDMA_CFG; - pata = 1; - break; + + /* configure sata bits if it is on this function */ + if (pa->pa_function == (ISSET(ctl0, JM_PCI_CTL0_AHCI_F1) ? 1 : 0)) { + ctl0 &= ~(JM_PCI_CTL0_AHCI_EN | JM_PCI_CTL0_SATA0_IDE | + JM_PCI_CTL0_SATA0_AHCI | JM_PCI_CTL0_SATA1_IDE | + JM_PCI_CTL0_SATA1_AHCI); + + switch (PCI_PRODUCT(pa->pa_id)) { + case PCI_PRODUCT_JMICRON_JMB360: + case PCI_PRODUCT_JMICRON_JMB361: + case PCI_PRODUCT_JMICRON_JMB362: + case PCI_PRODUCT_JMICRON_JMB363: + case PCI_PRODUCT_JMICRON_JMB365: + case PCI_PRODUCT_JMICRON_JMB366: + /* enable AHCI */ + ctl0 |= JM_PCI_CTL0_AHCI_EN | JM_PCI_CTL0_SATA0_AHCI | + JM_PCI_CTL0_SATA1_AHCI; + sata = 1; + break; + } + } + + /* configure pata bits if it is on this function */ + if (pa->pa_function == (ISSET(ctl0, JM_PCI_CTL0_PCIIDE_F1) ? 1 : 0)) { + ctl0 &= ~(JM_PCI_CTL0_PCIIDE_CS | JM_PCI_CTL0_IDEDMA_CFG); + ctl5 &= ~JM_PCI_CTL5_PATA1_PRI; + + switch (PCI_PRODUCT(pa->pa_id)) { + case PCI_PRODUCT_JMICRON_JMB366: + case PCI_PRODUCT_JMICRON_JMB365: + /* wire the second PATA port in the right place */ + ctl5 |= JM_PCI_CTL5_PATA1_PRI; + /* FALLTHROUGH */ + case PCI_PRODUCT_JMICRON_JMB363: + case PCI_PRODUCT_JMICRON_JMB361: + case PCI_PRODUCT_JMICRON_JMB368: + ctl0 |= JM_PCI_CTL0_PCIIDE_CS | JM_PCI_CTL0_IDEDMA_CFG; + pata = 1; + break; + } } pci_conf_write(pa->pa_pc, pa->pa_tag, JM_PCI_CTL0, ctl0); |