diff options
author | 2020-10-19 08:50:35 +0000 | |
---|---|---|
committer | 2020-10-19 08:50:35 +0000 | |
commit | 0b22cf4f82714e59920b2f00a83562b7f1658286 (patch) | |
tree | f88e020bd4a8f248c70ec671a4ff78af656e706b | |
parent | Save and restore the FPCR register such that floating-point control modes (diff) | |
download | wireguard-openbsd-0b22cf4f82714e59920b2f00a83562b7f1658286.tar.xz wireguard-openbsd-0b22cf4f82714e59920b2f00a83562b7f1658286.zip |
Skip floating-point exception checks on arm64 and armv7 as the hardware
(typically) doesn't implement support for these.
ok patrick@, drahn@
-rw-r--r-- | regress/lib/libc/setjmp-fpu/fpu.c | 4 | ||||
-rw-r--r-- | regress/lib/libc/setjmp-fpu/setjmp-fpu.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/regress/lib/libc/setjmp-fpu/fpu.c b/regress/lib/libc/setjmp-fpu/fpu.c index fbfc85a8ef5..86378541776 100644 --- a/regress/lib/libc/setjmp-fpu/fpu.c +++ b/regress/lib/libc/setjmp-fpu/fpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpu.c,v 1.1 2020/01/16 13:04:02 bluhm Exp $ */ +/* $OpenBSD: fpu.c,v 1.2 2020/10/19 08:50:35 kettenis Exp $ */ #include <err.h> #include <fenv.h> @@ -34,10 +34,12 @@ main(int argc, char *argv[]) rv = fegetround(); if (rv != FE_UPWARD) errx(1, "fegetround returned %d, not FE_UPWARD", rv); +#if !defined(__arm__) && !defined(__aarch64__) rv = fegetexcept(); if (rv != FE_DIVBYZERO) errx(1, "fegetexcept returned %d, not FE_DIVBYZERO", rv); +#endif /* Verify that the FPU exception flags weren't clobbered. */ flag = 0; diff --git a/regress/lib/libc/setjmp-fpu/setjmp-fpu.c b/regress/lib/libc/setjmp-fpu/setjmp-fpu.c index 3cdf906e97e..b74460e5eea 100644 --- a/regress/lib/libc/setjmp-fpu/setjmp-fpu.c +++ b/regress/lib/libc/setjmp-fpu/setjmp-fpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: setjmp-fpu.c,v 1.5 2020/01/16 13:04:02 bluhm Exp $ */ +/* $OpenBSD: setjmp-fpu.c,v 1.6 2020/10/19 08:50:35 kettenis Exp $ */ #include <err.h> #include <fenv.h> @@ -42,10 +42,12 @@ TEST_SETJMP(void) rv = fegetround(); if (rv != FE_UPWARD) errx(1, "fegetround returned %d, not FE_UPWARD", rv); +#if !defined(__arm__) && !defined(__aarch64__) rv = fegetexcept(); if (rv != FE_DIVBYZERO) errx(1, "fegetexcept returned %d, not FE_DIVBYZERO", rv); +#endif /* Verify that the FPU exception flags weren't clobbered. */ flag = 0; |