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author | 2011-04-12 20:29:35 +0000 | |
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committer | 2011-04-12 20:29:35 +0000 | |
commit | 0d70a4c1f5b05ad98471d608adb9b37bfb3a60e5 (patch) | |
tree | 038ceece3a6149fb5b04c59fc69511bc33831883 | |
parent | document size argument; prodded by jmc (diff) | |
download | wireguard-openbsd-0d70a4c1f5b05ad98471d608adb9b37bfb3a60e5.tar.xz wireguard-openbsd-0d70a4c1f5b05ad98471d608adb9b37bfb3a60e5.zip |
We need to delay 10msec after changing to/from D3 state. note: There are
some broken intel chipsets that require longer delays, we will cope with
that later hopefully.
ok kettenis
-rw-r--r-- | sys/dev/pci/pci.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c index c073ac705f7..016406167e2 100644 --- a/sys/dev/pci/pci.c +++ b/sys/dev/pci/pci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pci.c,v 1.88 2010/12/30 00:58:22 kettenis Exp $ */ +/* $OpenBSD: pci.c,v 1.89 2011/04/12 20:29:35 deraadt Exp $ */ /* $NetBSD: pci.c,v 1.31 1997/06/06 23:48:04 thorpej Exp $ */ /* @@ -571,9 +571,14 @@ pci_set_powerstate(pci_chipset_tag_t pc, pcitag_t tag, int state) } reg = pci_conf_read(pc, tag, offset + PCI_PMCSR); if ((reg & PCI_PMCSR_STATE_MASK) != state) { + int ostate = reg & PCI_PMCSR_STATE_MASK; + pci_conf_write(pc, tag, offset + PCI_PMCSR, (reg & ~PCI_PMCSR_STATE_MASK) | state); - return (reg & PCI_PMCSR_STATE_MASK); + if (state == PCI_PMCSR_STATE_D3 || + ostate == PCI_PMCSR_STATE_D3) + delay(10 * 1000); + return (ostate); } } return (state); |