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author | 2003-01-27 21:45:24 +0000 | |
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committer | 2003-01-27 21:45:24 +0000 | |
commit | 12331131fb7ad030136e52c3838d376a0501b2e3 (patch) | |
tree | 099341bdc2284b9855d779f0611b163a54b81765 | |
parent | padd < mimimum sized frames with 0's instead of whatever the chip wants; based on netbsd. (diff) | |
download | wireguard-openbsd-12331131fb7ad030136e52c3838d376a0501b2e3.tar.xz wireguard-openbsd-12331131fb7ad030136e52c3838d376a0501b2e3.zip |
Save all floating point registers to full register sized fields, not
half-sized areas. fixes preemption_float on powerpc.
-rw-r--r-- | lib/libpthread/arch/powerpc/uthread_machdep.c | 20 | ||||
-rw-r--r-- | lib/libpthread/arch/powerpc/uthread_machdep_asm.S | 33 |
2 files changed, 43 insertions, 10 deletions
diff --git a/lib/libpthread/arch/powerpc/uthread_machdep.c b/lib/libpthread/arch/powerpc/uthread_machdep.c index 845567a2913..f85801c13ff 100644 --- a/lib/libpthread/arch/powerpc/uthread_machdep.c +++ b/lib/libpthread/arch/powerpc/uthread_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: uthread_machdep.c,v 1.3 2000/10/05 04:59:34 rahnds Exp $ */ +/* $OpenBSD: uthread_machdep.c,v 1.4 2003/01/27 21:45:24 drahn Exp $ */ /* David Leonard, <d@csee.uq.edu.au>. Public domain */ #include <pthread.h> @@ -12,8 +12,8 @@ struct frame { int reserved; int gp[32-14]; int lr, cr, ctr, xer; - long fp[32-14]; - long fs; + double fp[32]; + double fs; /* The rest are only valid in the initial frame */ int next_r1; int next_lr; @@ -52,11 +52,15 @@ _thread_machdep_init(statep, base, len, entry) #define copysreg(nm) __asm__ volatile ("mf" #nm " %0" : "=r"(f->nm)) copysreg(cr); copysreg(ctr); copysreg(xer); -#define copyfreg(x) __asm__ volatile ("stfd " #x ", %0" : "=m"(f->fp[x-14])) - copyfreg(14); copyfreg(15); copyfreg(16); copyfreg(17); copyfreg(18); - copyfreg(19); copyfreg(20); copyfreg(21); copyfreg(22); copyfreg(23); - copyfreg(24); copyfreg(25); copyfreg(26); copyfreg(27); copyfreg(28); - copyfreg(29); copyfreg(30); copyfreg(31); +#define copyfreg(x) __asm__ volatile ("stfd " #x ", %0" : "=m"(f->fp[x])) + copyfreg(0); copyfreg(1); copyfreg(2); copyfreg(3); + copyfreg(4); copyfreg(5); copyfreg(6); copyfreg(7); + copyfreg(8); copyfreg(9); copyfreg(10); copyfreg(11); + copyfreg(12); copyfreg(13); copyfreg(14); copyfreg(15); + copyfreg(16); copyfreg(17); copyfreg(18); copyfreg(19); + copyfreg(20); copyfreg(21); copyfreg(22); copyfreg(23); + copyfreg(24); copyfreg(25); copyfreg(26); copyfreg(27); + copyfreg(28); copyfreg(29); copyfreg(30); copyfreg(31); __asm__ volatile ("mffs 0; stfd 0, %0" : "=m"(f->fs)); diff --git a/lib/libpthread/arch/powerpc/uthread_machdep_asm.S b/lib/libpthread/arch/powerpc/uthread_machdep_asm.S index 21cd4f0889e..b6a5a1acbea 100644 --- a/lib/libpthread/arch/powerpc/uthread_machdep_asm.S +++ b/lib/libpthread/arch/powerpc/uthread_machdep_asm.S @@ -1,11 +1,11 @@ -/* $OpenBSD: uthread_machdep_asm.S,v 1.1 2000/09/25 01:16:40 d Exp $ */ +/* $OpenBSD: uthread_machdep_asm.S,v 1.2 2003/01/27 21:45:24 drahn Exp $ */ /* David Leonard, <d@csee.uq.edu.au>. Public domain. */ #include <machine/asm.h> /* These need to be kept in sync with uthread_machdep.c */ #define REGOFF(n) (2*4 + (n-14)*4) -#define FPOFF(n) (REGOFF(36) + (n-14)*4) +#define FPOFF(n) (REGOFF(36) + (n)*8) #define FRAMESIZE FPOFF(33) #define SA(x) (((x)+0xf)&~0xf) @@ -36,6 +36,20 @@ ENTRY(_thread_machdep_switch) mfcr 0; stw 0, REGOFF(33)(1) mfctr 0; stw 0, REGOFF(34)(1) mfxer 0; stw 0, REGOFF(35)(1) + stfd 0, FPOFF(0)(1) + stfd 1, FPOFF(1)(1) + stfd 2, FPOFF(2)(1) + stfd 3, FPOFF(3)(1) + stfd 4, FPOFF(4)(1) + stfd 5, FPOFF(5)(1) + stfd 6, FPOFF(6)(1) + stfd 7, FPOFF(7)(1) + stfd 8, FPOFF(8)(1) + stfd 9, FPOFF(9)(1) + stfd 10, FPOFF(10)(1) + stfd 11, FPOFF(11)(1) + stfd 12, FPOFF(12)(1) + stfd 13, FPOFF(13)(1) stfd 14, FPOFF(14)(1) stfd 15, FPOFF(15)(1) stfd 16, FPOFF(16)(1) @@ -80,6 +94,21 @@ ENTRY(_thread_machdep_switch) lfd 16, FPOFF(16)(1) lfd 15, FPOFF(15)(1) lfd 14, FPOFF(14)(1) + lfd 13, FPOFF(13)(1) + lfd 12, FPOFF(12)(1) + lfd 11, FPOFF(11)(1) + lfd 10, FPOFF(10)(1) + lfd 9, FPOFF(9)(1) + lfd 8, FPOFF(8)(1) + lfd 7, FPOFF(7)(1) + lfd 6, FPOFF(6)(1) + lfd 5, FPOFF(5)(1) + lfd 4, FPOFF(4)(1) + lfd 3, FPOFF(3)(1) + lfd 2, FPOFF(2)(1) + lfd 1, FPOFF(1)(1) + lfd 0, FPOFF(0)(1) + lwz 0, REGOFF(35)(1); mtxer 0 lwz 0, REGOFF(34)(1); mtctr 0 lwz 0, REGOFF(33)(1); mtcr 0 |