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authorjsg <jsg@openbsd.org>2020-01-28 02:37:20 +0000
committerjsg <jsg@openbsd.org>2020-01-28 02:37:20 +0000
commit25b1f5913d001627dba4f4be56d9020a9de25e87 (patch)
treee088c89778a13b4e9621aa3d5288efdd8a7499a0
parentdrm/panel: make drm_panel.h self-contained (diff)
downloadwireguard-openbsd-25b1f5913d001627dba4f4be56d9020a9de25e87.tar.xz
wireguard-openbsd-25b1f5913d001627dba4f4be56d9020a9de25e87.zip
drm/radeon: fix bad DMA from INTERRUPT_CNTL2
From Sam Bobroff 6fab6dbff4a5843b8f44f87a2454450961c1f0bc in linux 4.19.y/4.19.99 62d91dd2851e8ae2ca552f1b090a3575a4edf759 in mainline linux
-rw-r--r--sys/dev/pci/drm/radeon/cik.c4
-rw-r--r--sys/dev/pci/drm/radeon/r600.c4
-rw-r--r--sys/dev/pci/drm/radeon/si.c4
3 files changed, 6 insertions, 6 deletions
diff --git a/sys/dev/pci/drm/radeon/cik.c b/sys/dev/pci/drm/radeon/cik.c
index b6c91ff4906..f8823d16226 100644
--- a/sys/dev/pci/drm/radeon/cik.c
+++ b/sys/dev/pci/drm/radeon/cik.c
@@ -6965,8 +6965,8 @@ static int cik_irq_init(struct radeon_device *rdev)
}
/* setup interrupt control */
- /* XXX this should actually be a bus address, not an MC address. same on older asics */
- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+ /* set dummy read address to dummy page address */
+ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
interrupt_cntl = RREG32(INTERRUPT_CNTL);
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
diff --git a/sys/dev/pci/drm/radeon/r600.c b/sys/dev/pci/drm/radeon/r600.c
index 2fa6028912d..fb31503c834 100644
--- a/sys/dev/pci/drm/radeon/r600.c
+++ b/sys/dev/pci/drm/radeon/r600.c
@@ -3690,8 +3690,8 @@ int r600_irq_init(struct radeon_device *rdev)
}
/* setup interrupt control */
- /* set dummy read address to ring address */
- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+ /* set dummy read address to dummy page address */
+ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
interrupt_cntl = RREG32(INTERRUPT_CNTL);
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
diff --git a/sys/dev/pci/drm/radeon/si.c b/sys/dev/pci/drm/radeon/si.c
index a66362d27ef..2b758adb7c2 100644
--- a/sys/dev/pci/drm/radeon/si.c
+++ b/sys/dev/pci/drm/radeon/si.c
@@ -5993,8 +5993,8 @@ static int si_irq_init(struct radeon_device *rdev)
}
/* setup interrupt control */
- /* set dummy read address to ring address */
- WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+ /* set dummy read address to dummy page address */
+ WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
interrupt_cntl = RREG32(INTERRUPT_CNTL);
/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
* IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN