It's been a quarter century: we can assume volatile is present with that name.

ok dlg@ mpi@ deraadt@

194 files changed, 972 insertions, 972 deletions

diff --git a/sys/arch/alpha/alpha/cpu.c b/sys/arch/alpha/alpha/cpu.c
index da4742e1892..efcb733e341 100644
--- a/sys/arch/alpha/alpha/cpu.c
+++ b/sys/arch/alpha/alpha/cpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.c,v 1.34 2014/02/03 18:42:05 miod Exp $ */
+/* $OpenBSD: cpu.c,v 1.35 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: cpu.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $ */
 
 /*-
@@ -87,9 +87,9 @@ struct cpu_info *cpu_info_list = &cpu_info_primary;
 struct cpu_info *cpu_info[ALPHA_MAXPROCS];
 
 /* Bitmask of CPUs booted, currently running, and paused. */
-__volatile u_long cpus_booted;
-__volatile u_long cpus_running;
-__volatile u_long cpus_paused;
+volatile u_long cpus_booted;
+volatile u_long cpus_running;
+volatile u_long cpus_paused;
 
 void	cpu_boot_secondary(struct cpu_info *);
 #endif /* MULTIPROCESSOR */
@@ -639,8 +639,8 @@ cpu_iccb_send(cpuid_t cpu_id, const char *msg)
 	strlcpy(pcsp->pcs_iccb.iccb_rxbuf, msg,
 	    sizeof pcsp->pcs_iccb.iccb_rxbuf);
 	pcsp->pcs_iccb.iccb_rxlen = strlen(msg);
-	/* XXX cast to __volatile */
-	atomic_setbits_ulong((__volatile u_long *)&hwrpb->rpb_rxrdy, cpumask);
+	/* XXX cast to volatile */
+	atomic_setbits_ulong((volatile u_long *)&hwrpb->rpb_rxrdy, cpumask);
 	alpha_mb();
 
 	/* Wait for the message to be received. */
diff --git a/sys/arch/alpha/alpha/db_interface.c b/sys/arch/alpha/alpha/db_interface.c
index ec3ae92e9b8..aa1db0ecaed 100644
--- a/sys/arch/alpha/alpha/db_interface.c
+++ b/sys/arch/alpha/alpha/db_interface.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_interface.c,v 1.19 2014/01/30 20:10:24 miod Exp $ */
+/* $OpenBSD: db_interface.c,v 1.20 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: db_interface.c,v 1.8 1999/10/12 17:08:57 jdolecek Exp $ */
 
 /* 
@@ -223,7 +223,7 @@ void
 Debugger()
 {
 
-	__asm __volatile("call_pal 0x81");		/* bugchk */
+	__asm volatile("call_pal 0x81");		/* bugchk */
 }
 
 /*
diff --git a/sys/arch/alpha/alpha/mutex.c b/sys/arch/alpha/alpha/mutex.c
index b10d89b2584..668ba8f77a4 100644
--- a/sys/arch/alpha/alpha/mutex.c
+++ b/sys/arch/alpha/alpha/mutex.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.c,v 1.11 2014/03/18 21:09:28 kettenis Exp $	*/
+/*	$OpenBSD: mutex.c,v 1.12 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -40,7 +40,7 @@ try_lock(struct mutex *mtx)
 #ifdef MULTIPROCESSOR
 	unsigned long t0, v0;
 
-	__asm __volatile(
+	__asm volatile(
 		"1:	ldl_l	%0, %3		\n"	/* t0 = mtx->mtx_lock */
 		"	bne	%0, 2f		\n"
 		"	bis	$31, 1, %0	\n"	/* t0 = 1 */
diff --git a/sys/arch/alpha/alpha/pmap.c b/sys/arch/alpha/alpha/pmap.c
index 744b2284d79..fe40fbaa9e8 100644
--- a/sys/arch/alpha/alpha/pmap.c
+++ b/sys/arch/alpha/alpha/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.71 2014/02/01 21:21:54 miod Exp $ */
+/* $OpenBSD: pmap.c,v 1.72 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: pmap.c,v 1.154 2000/12/07 22:18:55 thorpej Exp $ */
 
 /*-
@@ -2185,7 +2185,7 @@ pmap_zero_page(struct vm_page *pg)
 	 * Do only 8 back-to-back stores, and alternate registers.
 	 */
 	do {
-		__asm __volatile(
+		__asm volatile(
 		"# BEGIN loop body\n"
 		"	addq	%2, (8 * 8), %1		\n"
 		"	stq	$31, (0 * 8)(%0)	\n"
diff --git a/sys/arch/alpha/include/alpha_cpu.h b/sys/arch/alpha/include/alpha_cpu.h
index 0cc5423bc4f..f56c74ccfa1 100644
--- a/sys/arch/alpha/include/alpha_cpu.h
+++ b/sys/arch/alpha/include/alpha_cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: alpha_cpu.h,v 1.11 2012/06/26 01:59:47 deraadt Exp $ */
+/* $OpenBSD: alpha_cpu.h,v 1.12 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: alpha_cpu.h,v 1.43 2001/12/18 04:18:22 thorpej Exp $ */
 
 /*
@@ -335,12 +335,12 @@ alpha_rpcc(void)
 {
 	unsigned long v0;
 
-	__asm __volatile("rpcc %0" : "=r" (v0));
+	__asm volatile("rpcc %0" : "=r" (v0));
 	return (v0);
 }
 
-#define	alpha_mb()	__asm __volatile("mb" : : : "memory")
-#define	alpha_wmb()	__asm __volatile("mb" : : : "memory")	/* XXX */
+#define	alpha_mb()	__asm volatile("mb" : : : "memory")
+#define	alpha_wmb()	__asm volatile("mb" : : : "memory")	/* XXX */
 
 #if defined(_KERNEL) || defined(_STANDALONE)
 
@@ -355,10 +355,10 @@ unsigned long	_alpha_pal_swpipl(unsigned long);	/* for profiling */
 void		alpha_pal_wrent(void *, unsigned long);
 void		alpha_pal_wrvptptr(unsigned long);
 
-#define	alpha_pal_draina() __asm __volatile("call_pal %0 # PAL_draina"	\
+#define	alpha_pal_draina() __asm volatile("call_pal %0 # PAL_draina"	\
 				: : "i" (PAL_draina) : "memory")
 
-#define	alpha_pal_imb()	__asm __volatile("call_pal %0 # PAL_imb"	\
+#define	alpha_pal_imb()	__asm volatile("call_pal %0 # PAL_imb"	\
 				: : "i" (PAL_imb) : "memory")
 
 static __inline unsigned long
@@ -366,7 +366,7 @@ alpha_pal_rdmces(void)
 {
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_rdmces"
+	__asm volatile("call_pal %1 # PAL_OSF1_rdmces"
 		: "=r" (v0)
 		: "i" (PAL_OSF1_rdmces)
 		/* clobbers t0, t8..t11 */
@@ -380,7 +380,7 @@ alpha_pal_rdps(void)
 {
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_rdps"
+	__asm volatile("call_pal %1 # PAL_OSF1_rdps"
 		: "=r" (v0)
 		: "i" (PAL_OSF1_rdps)
 		/* clobbers t0, t8..t11 */
@@ -394,7 +394,7 @@ alpha_pal_rdusp(void)
 {
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_rdusp"
+	__asm volatile("call_pal %1 # PAL_OSF1_rdusp"
 		: "=r" (v0)
 		: "i" (PAL_OSF1_rdusp)
 		/* clobbers t0, t8..t11 */
@@ -408,7 +408,7 @@ alpha_pal_rdval(void)
 {
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_rdval"
+	__asm volatile("call_pal %1 # PAL_OSF1_rdval"
 		: "=r" (v0)
 		: "i" (PAL_OSF1_rdval)
 		/* clobbers t0, t8..t11 */
@@ -423,7 +423,7 @@ alpha_pal_swpctx(unsigned long ctx)
 	register unsigned long a0 __asm("$16") = ctx;
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %2 # PAL_OSF1_swpctx"
+	__asm volatile("call_pal %2 # PAL_OSF1_swpctx"
 		: "=r" (a0), "=r" (v0)
 		: "i" (PAL_OSF1_swpctx), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
@@ -438,7 +438,7 @@ alpha_pal_swpipl(unsigned long ipl)
 	register unsigned long a0 __asm("$16") = ipl;
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %2 # PAL_OSF1_swpipl"
+	__asm volatile("call_pal %2 # PAL_OSF1_swpipl"
 		: "=r" (a0), "=r" (v0)
 		: "i" (PAL_OSF1_swpipl), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
@@ -453,7 +453,7 @@ alpha_pal_tbi(unsigned long op, vaddr_t va)
 	register unsigned long a0 __asm("$16") = op;
 	register unsigned long a1 __asm("$17") = va;
 
-	__asm __volatile("call_pal %2 # PAL_OSF1_tbi"
+	__asm volatile("call_pal %2 # PAL_OSF1_tbi"
 		: "=r" (a0), "=r" (a1)
 		: "i" (PAL_OSF1_tbi), "0" (a0), "1" (a1)
 		/* clobbers t0, t8..t11, a0 (above), a1 (above) */
@@ -465,7 +465,7 @@ alpha_pal_whami(void)
 {
 	register unsigned long v0 __asm("$0");
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_whami"
+	__asm volatile("call_pal %1 # PAL_OSF1_whami"
 		: "=r" (v0)
 		: "i" (PAL_OSF1_whami)
 		/* clobbers t0, t8..t11 */
@@ -479,7 +479,7 @@ alpha_pal_wrfen(unsigned long onoff)
 {
 	register unsigned long a0 __asm("$16") = onoff;
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_wrfen"
+	__asm volatile("call_pal %1 # PAL_OSF1_wrfen"
 		: "=r" (a0)
 		: "i" (PAL_OSF1_wrfen), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
@@ -491,7 +491,7 @@ alpha_pal_wripir(unsigned long cpu_id)
 {
 	register unsigned long a0 __asm("$16") = cpu_id;
 
-	__asm __volatile("call_pal %1 # PAL_ipir"
+	__asm volatile("call_pal %1 # PAL_ipir"
 		: "=r" (a0)
 		: "i" (PAL_ipir), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
@@ -503,7 +503,7 @@ alpha_pal_wrusp(unsigned long usp)
 {
 	register unsigned long a0 __asm("$16") = usp;
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_wrusp"
+	__asm volatile("call_pal %1 # PAL_OSF1_wrusp"
 		: "=r" (a0)
 		: "i" (PAL_OSF1_wrusp), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
@@ -515,7 +515,7 @@ alpha_pal_wrmces(unsigned long mces)
 {
 	register unsigned long a0 __asm("$16") = mces;
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_wrmces"
+	__asm volatile("call_pal %1 # PAL_OSF1_wrmces"
 		: "=r" (a0)
 		: "i" (PAL_OSF1_wrmces), "0" (a0)
 		/* clobbers t0, t8..t11 */
@@ -527,7 +527,7 @@ alpha_pal_wrval(unsigned long val)
 {
 	register unsigned long a0 __asm("$16") = val;
 
-	__asm __volatile("call_pal %1 # PAL_OSF1_wrval"
+	__asm volatile("call_pal %1 # PAL_OSF1_wrval"
 		: "=r" (a0)
 		: "i" (PAL_OSF1_wrval), "0" (a0)
 		/* clobbers t0, t8..t11, a0 (above) */
diff --git a/sys/arch/alpha/include/atomic.h b/sys/arch/alpha/include/atomic.h
index 7198176e944..f25ae6b766d 100644
--- a/sys/arch/alpha/include/atomic.h
+++ b/sys/arch/alpha/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.11 2014/01/26 17:40:11 miod Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.12 2014/03/29 18:09:28 guenther Exp $	*/
 /* $NetBSD: atomic.h,v 1.7 2001/12/17 23:34:57 thorpej Exp $ */
 
 /*-
@@ -46,11 +46,11 @@
  *	Atomically set bits in a `unsigned long'.
  */
 static __inline void
-atomic_setbits_ulong(__volatile unsigned long *ulp, unsigned long v)
+atomic_setbits_ulong(volatile unsigned long *ulp, unsigned long v)
 {
 	unsigned long t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_setbits_ulong\n"
 		"1:	ldq_l	%0, %1		\n"
 		"	or	%0, %2, %0	\n"
@@ -72,11 +72,11 @@ atomic_setbits_ulong(__volatile unsigned long *ulp, unsigned long v)
  *	Atomically clear bits in a `unsigned long'.
  */
 static __inline void
-atomic_clearbits_ulong(__volatile unsigned long *ulp, unsigned long v)
+atomic_clearbits_ulong(volatile unsigned long *ulp, unsigned long v)
 {
 	unsigned long t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_clearbits_ulong\n"
 		"1:	ldq_l	%0, %1		\n"
 		"	and	%0, %2, %0	\n"
@@ -98,11 +98,11 @@ atomic_clearbits_ulong(__volatile unsigned long *ulp, unsigned long v)
  *	Atomically add a value to a `unsigned long'.
  */
 static __inline void
-atomic_add_ulong(__volatile unsigned long *ulp, unsigned long v)
+atomic_add_ulong(volatile unsigned long *ulp, unsigned long v)
 {
 	unsigned long t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_add_ulong\n"
 		"1:	ldq_l	%0, %1		\n"
 		"	addq	%0, %2, %0	\n"
@@ -124,11 +124,11 @@ atomic_add_ulong(__volatile unsigned long *ulp, unsigned long v)
  *	Atomically subtract a value from a `unsigned long'.
  */
 static __inline void
-atomic_sub_ulong(__volatile unsigned long *ulp, unsigned long v)
+atomic_sub_ulong(volatile unsigned long *ulp, unsigned long v)
 {
 	unsigned long t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_sub_ulong\n"
 		"1:	ldq_l	%0, %1		\n"
 		"	subq	%0, %2, %0	\n"
@@ -150,11 +150,11 @@ atomic_sub_ulong(__volatile unsigned long *ulp, unsigned long v)
  *	Atomically load and latch a `unsigned long' value.
  */
 static __inline unsigned long
-atomic_loadlatch_ulong(__volatile unsigned long *ulp, unsigned long v)
+atomic_loadlatch_ulong(volatile unsigned long *ulp, unsigned long v)
 {
 	unsigned long t0, v0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_loadlatch_ulong\n"
 		"1:	mov	%3, %0		\n"
 		"	ldq_l	%1, %2		\n"
@@ -178,11 +178,11 @@ atomic_loadlatch_ulong(__volatile unsigned long *ulp, unsigned long v)
  *	Atomically set bits in a `unsigned int'.
  */
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_setbits_ulong\n"
 		"1:	ldl_l	%0, %1		\n"
 		"	or	%0, %2, %0	\n"
@@ -204,11 +204,11 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
  *	Atomically clear bits in a `unsigned int'.
  */
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_clearbits_int\n"
 		"1:	ldl_l	%0, %1		\n"
 		"	and	%0, %2, %0	\n"
@@ -230,11 +230,11 @@ atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
  *	Atomically add a value to an `int'.
  */
 static __inline void
-atomic_add_int(__volatile int *ulp, int v)
+atomic_add_int(volatile int *ulp, int v)
 {
 	unsigned long t0;
 
-	__asm __volatile(
+	__asm volatile(
 		"# BEGIN atomic_add_int\n"
 		"1:	ldl_l	%0, %1		\n"
 		"	addl	%0, %2, %0	\n"
diff --git a/sys/arch/alpha/include/bwx.h b/sys/arch/alpha/include/bwx.h
index 755713e255f..267cf60455d 100644
--- a/sys/arch/alpha/include/bwx.h
+++ b/sys/arch/alpha/include/bwx.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: bwx.h,v 1.6 2011/03/23 16:54:34 pirofti Exp $ */
+/* $OpenBSD: bwx.h,v 1.7 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: bwx.h,v 1.3 2000/06/08 02:55:37 thorpej Exp $ */
 
 /*-
@@ -48,11 +48,11 @@
 #define BWX_EV56_INT1	(3L << 37)
 
 static __inline u_int8_t
-alpha_ldbu(__volatile u_int8_t *a0)
+alpha_ldbu(volatile u_int8_t *a0)
 {
 	u_int8_t v0;
 
-	__asm __volatile("ldbu %0, %1"
+	__asm volatile("ldbu %0, %1"
 		: "=r" (v0)
 		: "m" (*a0));
 
@@ -60,11 +60,11 @@ alpha_ldbu(__volatile u_int8_t *a0)
 }
 
 static __inline u_int16_t
-alpha_ldwu(__volatile u_int16_t *a0)
+alpha_ldwu(volatile u_int16_t *a0)
 {
 	u_int16_t v0;
 
-	__asm __volatile("ldwu %0, %1"
+	__asm volatile("ldwu %0, %1"
 		: "=r" (v0)
 		: "m" (*a0));
 
@@ -72,36 +72,36 @@ alpha_ldwu(__volatile u_int16_t *a0)
 }
 
 static __inline u_int32_t
-alpha_ldlu(__volatile u_int32_t *a0)
+alpha_ldlu(volatile u_int32_t *a0)
 {
 	return (*a0);
 }
 
 static __inline void
-alpha_stb(__volatile u_int8_t *a0, u_int8_t a1)
+alpha_stb(volatile u_int8_t *a0, u_int8_t a1)
 {
 
-	__asm __volatile("stb %1, %0"
+	__asm volatile("stb %1, %0"
 		: "=m" (*a0)
 		: "r" (a1)
 		: "memory");
 }
 
 static __inline void
-alpha_stw(__volatile u_int16_t *a0, u_int16_t a1)
+alpha_stw(volatile u_int16_t *a0, u_int16_t a1)
 {
 
-	__asm __volatile("stw %1, %0"
+	__asm volatile("stw %1, %0"
 		: "=m" (*a0)
 		: "r" (a1)
 		: "memory");
 }
 
 static __inline void
-alpha_stl(__volatile u_int32_t *a0, u_int32_t a1)
+alpha_stl(volatile u_int32_t *a0, u_int32_t a1)
 {
 
-	__asm __volatile("stl %1, %0"
+	__asm volatile("stl %1, %0"
 		: "=m" (*a0)
 		: "r" (a1)
 		: "memory");
@@ -112,7 +112,7 @@ alpha_sextb(u_int8_t a0)
 {
 	u_int8_t v0;
 
-	__asm __volatile("sextb %1, %0"
+	__asm volatile("sextb %1, %0"
 		: "=r" (v0)
 		: "r" (a0)
 		: "memory");
@@ -125,7 +125,7 @@ alpha_sextw(u_int16_t a0)
 {
 	u_int16_t v0;
 
-	__asm __volatile("sextw %1, %0"
+	__asm volatile("sextw %1, %0"
 		: "=r" (v0)
 		: "r" (a0)
 		: "memory");
diff --git a/sys/arch/alpha/include/cpu.h b/sys/arch/alpha/include/cpu.h
index 8b2f93fa2b8..4174e051d05 100644
--- a/sys/arch/alpha/include/cpu.h
+++ b/sys/arch/alpha/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.51 2014/01/26 17:40:11 miod Exp $ */
+/* $OpenBSD: cpu.h,v 1.52 2014/03/29 18:09:28 guenther Exp $ */
 /* $NetBSD: cpu.h,v 1.45 2000/08/21 02:03:12 thorpej Exp $ */
 
 /*-
@@ -167,8 +167,8 @@ void	cpu_resume(unsigned long);
  * Machine check information.
  */
 struct mchkinfo {
-	__volatile int mc_expected;	/* machine check is expected */
-	__volatile int mc_received;	/* machine check was received */
+	volatile int mc_expected;	/* machine check is expected */
+	volatile int mc_received;	/* machine check was received */
 };
 
 struct cpu_info {
@@ -203,8 +203,8 @@ struct cpu_info {
 	struct trapframe *ci_db_regs;	/* registers for debuggers */
 
 #if defined(MULTIPROCESSOR)
-	__volatile u_long ci_flags;	/* flags; see below */
-	__volatile u_long ci_ipis;	/* interprocessor interrupts pending */
+	volatile u_long ci_flags;	/* flags; see below */
+	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
 #endif
 #ifdef GPROF
 	struct gmonparam *ci_gmon;
@@ -230,8 +230,8 @@ extern	struct cpu_info *cpu_info_list;
 #define MAXCPUS	ALPHA_MAXPROCS
 
 #if defined(MULTIPROCESSOR)
-extern	__volatile u_long cpus_running;
-extern	__volatile u_long cpus_paused;
+extern	volatile u_long cpus_running;
+extern	volatile u_long cpus_paused;
 extern	struct cpu_info *cpu_info[];
 
 #define	curcpu()			((struct cpu_info *)alpha_pal_rdval())
diff --git a/sys/arch/alpha/include/lock.h b/sys/arch/alpha/include/lock.h
index 56d4a70898a..2d24ca142f8 100644
--- a/sys/arch/alpha/include/lock.h
+++ b/sys/arch/alpha/include/lock.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: lock.h,v 1.6 2014/02/01 21:18:24 miod Exp $	*/
+/* $OpenBSD: lock.h,v 1.7 2014/03/29 18:09:28 guenther Exp $	*/
 /* $NetBSD: lock.h,v 1.16 2001/12/17 23:34:57 thorpej Exp $ */
 
 /*-
@@ -67,7 +67,7 @@ __cpu_cas(volatile unsigned long *addr, unsigned long old, unsigned long new)
 {
 	unsigned long t0, v0;
 
-	__asm __volatile(
+	__asm volatile(
 		"1:	ldq_l	%1, 0(%2)	\n"	/* v0 = *addr */
 		"	cmpeq	%1, %3, %0	\n"	/* t0 = v0 == old */
 		"	beq	%0, 2f		\n"
diff --git a/sys/arch/alpha/include/pcb.h b/sys/arch/alpha/include/pcb.h
index 47de4e5ae8e..6b5528852f2 100644
--- a/sys/arch/alpha/include/pcb.h
+++ b/sys/arch/alpha/include/pcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pcb.h,v 1.9 2011/03/23 16:54:34 pirofti Exp $	*/
+/*	$OpenBSD: pcb.h,v 1.10 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: pcb.h,v 1.5 1996/11/13 22:21:00 cgd Exp $	*/
 
 /*
@@ -54,7 +54,7 @@ struct pcb {
 	unsigned long	pcb_context[9];		/* s[0-6], ra, ps	[SW] */
 	struct fpreg	pcb_fp;			/* FP registers		[SW] */
 	unsigned long	pcb_onfault;		/* for copy faults	[SW] */
-	struct cpu_info *__volatile pcb_fpcpu;	/* CPU with our FP state[SW] */
+	struct cpu_info *volatile pcb_fpcpu;	/* CPU with our FP state[SW] */
 };
 
 /*
diff --git a/sys/arch/alpha/pci/irongate_pci.c b/sys/arch/alpha/pci/irongate_pci.c
index fb7cf035167..0951015108a 100644
--- a/sys/arch/alpha/pci/irongate_pci.c
+++ b/sys/arch/alpha/pci/irongate_pci.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: irongate_pci.c,v 1.6 2010/12/04 17:06:31 miod Exp $	*/
+/*	$OpenBSD: irongate_pci.c,v 1.7 2014/03/29 18:09:28 guenther Exp $	*/
 /* $NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $ */
 
 /*-
@@ -64,7 +64,7 @@ void		irongate_conf_write(void *, pcitag_t, int, pcireg_t);
 #define	PCI_CONF_ADDR	(IRONGATE_IO_BASE|IRONGATE_CONFADDR)
 #define	PCI_CONF_DATA	(IRONGATE_IO_BASE|IRONGATE_CONFDATA)
 
-#define	REGVAL(r)	(*(__volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
+#define	REGVAL(r)	(*(volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
 
 void
 irongate_pci_init(pci_chipset_tag_t pc, void *v)
diff --git a/sys/arch/amd64/amd64/bus_space.c b/sys/arch/amd64/amd64/bus_space.c
index db97076b29b..eca39be4e64 100644
--- a/sys/arch/amd64/amd64/bus_space.c
+++ b/sys/arch/amd64/amd64/bus_space.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_space.c,v 1.22 2013/01/18 01:54:40 dlg Exp $	*/
+/*	$OpenBSD: bus_space.c,v 1.23 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: bus_space.c,v 1.2 2003/03/14 18:47:53 christos Exp $	*/
 
 /*-
@@ -695,7 +695,7 @@ x86_bus_space_io_read_region_1(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile(" cld					;"
+	__asm volatile(" cld				;"
 	"1:	inb %w1,%%al				;"
 	"	stosb					;"
 	"	incl %1					;"
@@ -715,7 +715,7 @@ x86_bus_space_io_read_region_2(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	inw %w1,%%ax				;"
 	"	stosw					;"
 	"	addl $2,%1				;"
@@ -735,7 +735,7 @@ x86_bus_space_io_read_region_4(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	inl %w1,%%eax				;"
 	"	stosl					;"
 	"	addl $4,%1				;"
@@ -814,7 +814,7 @@ x86_bus_space_io_write_region_1(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	lodsb					;"
 	"	outb %%al,%w1				;"
 	"	incl %1					;"
@@ -834,7 +834,7 @@ x86_bus_space_io_write_region_2(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	lodsw					;"
 	"	outw %%ax,%w1				;"
 	"	addl $2,%1				;"
@@ -854,7 +854,7 @@ x86_bus_space_io_write_region_4(bus_space_handle_t h,
 	int dummy3;
 	int __x;
 	u_int32_t port = h + o;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	lodsl					;"
 	"	outl %%eax,%w1				;"
 	"	addl $4,%1				;"
@@ -1067,7 +1067,7 @@ x86_bus_space_mem_read_multi_1(bus_space_handle_t h, bus_size_t o,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	movb (%2),%%al				;"
 	"	stosb					;"
 	"	loop 1b"				:
@@ -1084,7 +1084,7 @@ x86_bus_space_mem_read_multi_2(bus_space_handle_t h, bus_size_t o,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	movw (%2),%%ax				;"
 	"	stosw					;"
 	"	loop 1b"				:
@@ -1101,7 +1101,7 @@ x86_bus_space_mem_read_multi_4(bus_space_handle_t h, bus_size_t o,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	movl (%2),%%eax				;"
 	"	stosl					;"
 	"	loop 1b"				:
@@ -1118,7 +1118,7 @@ x86_bus_space_mem_read_multi_8(bus_space_handle_t h, bus_size_t o,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"1:	movq (%2),%%rax				;"
 	"	stosq					;"
 	"	loop 1b"				:
@@ -1134,7 +1134,7 @@ x86_bus_space_mem_read_region_1(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"	repne					;"
 	"	movsb"					:
 	    "=S" (dummy1), "=D" (dummy2), "=c" (dummy3)	:
@@ -1149,7 +1149,7 @@ x86_bus_space_mem_read_region_2(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile(" cld				;"
+	__asm volatile(" cld				;"
 	"	repne					;"
 	"	movsw"					:
 	    "=S" (dummy1), "=D" (dummy2), "=c" (dummy3)	:
@@ -1164,7 +1164,7 @@ x86_bus_space_mem_read_region_4(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsl"					:
 	    "=S" (dummy1), "=D" (dummy2), "=c" (dummy3)	:
@@ -1179,7 +1179,7 @@ x86_bus_space_mem_read_region_8(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsq"					:
 	    "=S" (dummy1), "=D" (dummy2), "=c" (dummy3)	:
@@ -1207,7 +1207,7 @@ x86_bus_space_mem_write_multi_1(bus_space_handle_t h,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	lodsb					;"
 	"	movb %%al,(%2)				;"
 	"	loop 1b"				:
@@ -1223,7 +1223,7 @@ x86_bus_space_mem_write_multi_2(bus_space_handle_t h,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile("cld					;"
+	__asm volatile("cld				;"
 	"1:	lodsw					;"
 	"	movw %%ax,(%2)				;"
 	"	loop 1b"				:
@@ -1239,7 +1239,7 @@ x86_bus_space_mem_write_multi_4(bus_space_handle_t h,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	lodsl					;"
 	"	movl %%eax,(%2)				;"
 	"	loop 1b"				:
@@ -1255,7 +1255,7 @@ x86_bus_space_mem_write_multi_8(bus_space_handle_t h,
 	int dummy2;
 	void *dummy3;
 	int __x;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"1:	lodsq					;"
 	"	movq %%rax,(%2)				;"
 	"	loop 1b"				:
@@ -1270,7 +1270,7 @@ x86_bus_space_mem_write_region_1(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsb"					:
 	    "=D" (dummy1), "=S" (dummy2), "=c" (dummy3)	:
@@ -1285,7 +1285,7 @@ x86_bus_space_mem_write_region_2(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsw"					:
 	    "=D" (dummy1), "=S" (dummy2), "=c" (dummy3)	:
@@ -1300,7 +1300,7 @@ x86_bus_space_mem_write_region_4(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsl"					:
 	    "=D" (dummy1), "=S" (dummy2), "=c" (dummy3)	:
@@ -1315,7 +1315,7 @@ x86_bus_space_mem_write_region_8(bus_space_handle_t h,
 	int dummy1;
 	void *dummy2;
 	int dummy3;
-	__asm __volatile("cld				;"
+	__asm volatile("cld				;"
 	"	repne					;"
 	"	movsq"					:
 	    "=D" (dummy1), "=S" (dummy2), "=c" (dummy3)	:
diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c
index 2039f0c12f6..19e054efcd2 100644
--- a/sys/arch/amd64/amd64/cpu.c
+++ b/sys/arch/amd64/amd64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.59 2014/01/19 12:45:35 deraadt Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.60 2014/03/29 18:09:28 guenther Exp $	*/
 /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */
 
 /*-
@@ -932,7 +932,7 @@ rdrand(void *v)
 	int i;
 
 	for (i = 0; i < 2; i++) {
-		__asm __volatile(
+		__asm volatile(
 		    "xor	%1, %1\n\t"
 		    "rdrand	%0\n\t"
 		    "rcl	$1, %1\n"
diff --git a/sys/arch/amd64/amd64/fpu.c b/sys/arch/amd64/amd64/fpu.c
index 6322bfe0579..fbc781a987d 100644
--- a/sys/arch/amd64/amd64/fpu.c
+++ b/sys/arch/amd64/amd64/fpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fpu.c,v 1.27 2012/08/30 16:10:32 kettenis Exp $	*/
+/*	$OpenBSD: fpu.c,v 1.28 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: fpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $	*/
 
 /*-
@@ -262,7 +262,7 @@ fpudna(struct cpu_info *ci)
 		 * thus leaking other process's execution history.
 		 */
 		fnclex();
-		__asm __volatile("ffree %%st(7)\n\tfldl %0" : : "m" (zero));
+		__asm volatile("ffree %%st(7)\n\tfldl %0" : : "m" (zero));
 		fxrstor(sfp);
 	}
 }
diff --git a/sys/arch/amd64/amd64/intr.c b/sys/arch/amd64/amd64/intr.c
index cbc5cf4dad7..d66170e8bd2 100644
--- a/sys/arch/amd64/amd64/intr.c
+++ b/sys/arch/amd64/amd64/intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.c,v 1.35 2013/06/26 19:53:50 kettenis Exp $	*/
+/*	$OpenBSD: intr.c,v 1.36 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: intr.c,v 1.3 2003/03/03 22:16:20 fvdl Exp $	*/
 
 /*
@@ -737,6 +737,6 @@ softintr(int sir)
 {
 	struct cpu_info *ci = curcpu();
 
-	__asm __volatile("lock; orq %1, %0" :
+	__asm volatile("lock; orq %1, %0" :
 	    "=m"(ci->ci_ipending) : "ir" (1UL << sir));
 }
diff --git a/sys/arch/amd64/amd64/ipifuncs.c b/sys/arch/amd64/amd64/ipifuncs.c
index 9eec8c24601..608570f5386 100644
--- a/sys/arch/amd64/amd64/ipifuncs.c
+++ b/sys/arch/amd64/amd64/ipifuncs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ipifuncs.c,v 1.22 2014/01/21 09:40:54 kettenis Exp $	*/
+/*	$OpenBSD: ipifuncs.c,v 1.23 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: ipifuncs.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $ */
 
 /*-
@@ -109,7 +109,7 @@ x86_64_ipi_halt(struct cpu_info *ci)
 	wbinvd();
 
 	for(;;) {
-		__asm __volatile("hlt");
+		__asm volatile("hlt");
 	}
 }
 
diff --git a/sys/arch/amd64/amd64/lapic.c b/sys/arch/amd64/amd64/lapic.c
index bd2e7c8943b..d09e3fca2e8 100644
--- a/sys/arch/amd64/amd64/lapic.c
+++ b/sys/arch/amd64/amd64/lapic.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lapic.c,v 1.30 2014/03/07 16:56:57 guenther Exp $	*/
+/*	$OpenBSD: lapic.c,v 1.31 2014/03/29 18:09:28 guenther Exp $	*/
 /* $NetBSD: lapic.c,v 1.2 2003/05/08 01:04:35 fvdl Exp $ */
 
 /*-
@@ -470,7 +470,7 @@ i82489_icr_wait(void)
 #endif /* DIAGNOSTIC */
 
 	while ((i82489_readreg(LAPIC_ICRLO) & LAPIC_DLSTAT_BUSY) != 0) {
-		__asm __volatile("pause": : :"memory");
+		__asm volatile("pause": : :"memory");
 #ifdef DIAGNOSTIC
 		j--;
 		if (j == 0)
diff --git a/sys/arch/amd64/amd64/machdep.c b/sys/arch/amd64/amd64/machdep.c
index bf473a4d68e..fd475cd34c9 100644
--- a/sys/arch/amd64/amd64/machdep.c
+++ b/sys/arch/amd64/amd64/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.176 2014/03/26 05:23:42 guenther Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.177 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: machdep.c,v 1.3 2003/05/07 22:58:18 fvdl Exp $	*/
 
 /*-
@@ -1653,7 +1653,7 @@ cpu_reset(void)
 	 * invalid and causing a fault.
 	 */
 	memset((caddr_t)idt, 0, NIDT * sizeof(idt[0]));
-	__asm __volatile("divl %0,%1" : : "q" (0), "a" (0)); 
+	__asm volatile("divl %0,%1" : : "q" (0), "a" (0)); 
 
 #if 0
 	/*
diff --git a/sys/arch/amd64/amd64/pctr.c b/sys/arch/amd64/amd64/pctr.c
index fb1bbd43498..d2e1e794c42 100644
--- a/sys/arch/amd64/amd64/pctr.c
+++ b/sys/arch/amd64/amd64/pctr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pctr.c,v 1.4 2007/10/24 17:56:56 mikeb Exp $	*/
+/*	$OpenBSD: pctr.c,v 1.5 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007 Mike Belopuhov
@@ -59,11 +59,11 @@ pctrrd(struct pctrst *st)
 	reg = pctr_isamd ? MSR_K7_EVNTSEL0 : MSR_EVNTSEL0;
 	for (i = 0; i < num; i++)
 		st->pctr_fn[i] = rdmsr(reg + i);
-	__asm __volatile("cli");
+	__asm volatile("cli");
 	st->pctr_tsc = rdtsc();
 	for (i = 0; i < num; i++)
 		st->pctr_hwc[i] = rdpmc(i);
-	__asm __volatile("sti");
+	__asm volatile("sti");
 }
 
 void
@@ -79,14 +79,14 @@ pctrattach(int num)
 
 	if (usepctr) {
 		/* Enable RDTSC and RDPMC instructions from user-level. */
-		__asm __volatile("movq %%cr4,%%rax\n"
+		__asm volatile("movq %%cr4,%%rax\n"
 				 "\tandq %0,%%rax\n"
 				 "\torq %1,%%rax\n"
 				 "\tmovq %%rax,%%cr4"
 				 :: "i" (~CR4_TSD), "i" (CR4_PCE) : "rax");
 	} else if (usetsc) {
 		/* Enable RDTSC instruction from user-level. */
-		__asm __volatile("movq %%cr4,%%rax\n"
+		__asm volatile("movq %%cr4,%%rax\n"
 				 "\tandq %0,%%rax\n"
 				 "\tmovq %%rax,%%cr4"
 				 :: "i" (~CR4_TSD) : "rax");
diff --git a/sys/arch/amd64/amd64/via.c b/sys/arch/amd64/amd64/via.c
index 99dae0af125..31bb1c0837e 100644
--- a/sys/arch/amd64/amd64/via.c
+++ b/sys/arch/amd64/amd64/via.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: via.c,v 1.14 2013/06/02 16:38:05 guenther Exp $	*/
+/*	$OpenBSD: via.c,v 1.15 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -325,8 +325,8 @@ viac3_cbc(void *cw, void *src, void *dst, void *key, int rep,
 	lcr0(creg0 & ~(CR0_EM|CR0_TS));
 
 	/* Do the deed */
-	__asm __volatile("pushfq; popfq");
-	__asm __volatile("rep xcryptcbc" :
+	__asm volatile("pushfq; popfq");
+	__asm volatile("rep xcryptcbc" :
 	    : "b" (key), "a" (iv), "c" (rep), "d" (cw), "S" (src), "D" (dst)
 	    : "memory", "cc");
 
@@ -533,7 +533,7 @@ viac3_rnd(void *v)
 	 * sure that we turn on maximum whitening (%edx[0,1] == "11"), so
 	 * that we get the best random data possible.
 	 */
-	__asm __volatile("rep xstorerng"
+	__asm volatile("rep xstorerng"
 	    : "=a" (rv) : "d" (3), "D" (buffer), "c" (len*sizeof(int))
 	    : "memory", "cc");
 
diff --git a/sys/arch/amd64/include/atomic.h b/sys/arch/amd64/include/atomic.h
index 55360123f0c..d25ec726796 100644
--- a/sys/arch/amd64/include/atomic.h
+++ b/sys/arch/amd64/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.11 2014/03/27 10:24:40 dlg Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.12 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: atomic.h,v 1.1 2003/04/26 18:39:37 fvdl Exp $	*/
 
 /*
@@ -58,7 +58,7 @@
 static inline unsigned int
 _atomic_cas_uint(volatile unsigned int *p, unsigned int e, unsigned int n)
 {
-	__asm __volatile(LOCK " cmpxchgl %2, %1"
+	__asm volatile(LOCK " cmpxchgl %2, %1"
 	    : "=a" (n), "=m" (*p)
 	    : "r" (n), "a" (e), "m" (*p)
 	    : "memory");
@@ -70,7 +70,7 @@ _atomic_cas_uint(volatile unsigned int *p, unsigned int e, unsigned int n)
 static inline unsigned long
 _atomic_cas_ulong(volatile unsigned long *p, unsigned long e, unsigned long n)
 {
-	__asm __volatile(LOCK " cmpxchgq %2, %1"
+	__asm volatile(LOCK " cmpxchgq %2, %1"
 	    : "=a" (n), "=m" (*p)
 	    : "r" (n), "a" (e), "m" (*p)
 	    : "memory");
@@ -82,7 +82,7 @@ _atomic_cas_ulong(volatile unsigned long *p, unsigned long e, unsigned long n)
 static inline void *
 _atomic_cas_ptr(volatile void **p, void *e, void *n)
 {
-	__asm __volatile(LOCK " cmpxchgq %2, %1"
+	__asm volatile(LOCK " cmpxchgq %2, %1"
 	    : "=a" (n), "=m" (*p)
 	    : "r" (n), "a" (e), "m" (*p)
 	    : "memory");
@@ -109,13 +109,13 @@ x86_atomic_testset_u32(volatile u_int32_t *ptr, u_int32_t val)
 static __inline void
 x86_atomic_setbits_u32(volatile u_int32_t *ptr, u_int32_t bits)
 {
-	__asm __volatile(LOCK " orl %1,%0" :  "=m" (*ptr) : "ir" (bits));
+	__asm volatile(LOCK " orl %1,%0" :  "=m" (*ptr) : "ir" (bits));
 }
 
 static __inline void
 x86_atomic_clearbits_u32(volatile u_int32_t *ptr, u_int32_t bits)
 {
-	__asm __volatile(LOCK " andl %1,%0" :  "=m" (*ptr) : "ir" (~bits));
+	__asm volatile(LOCK " andl %1,%0" :  "=m" (*ptr) : "ir" (~bits));
 }
 
 /*
@@ -128,13 +128,13 @@ x86_atomic_clearbits_u32(volatile u_int32_t *ptr, u_int32_t bits)
 static __inline void
 x86_atomic_setbits_u64(volatile u_int64_t *ptr, u_int64_t bits)
 {
-	__asm __volatile(LOCK " orq %1,%0" :  "=m" (*ptr) : "ir" (bits));
+	__asm volatile(LOCK " orq %1,%0" :  "=m" (*ptr) : "ir" (bits));
 }
 
 static __inline void
 x86_atomic_clearbits_u64(volatile u_int64_t *ptr, u_int64_t bits)
 {
-	__asm __volatile(LOCK " andq %1,%0" :  "=m" (*ptr) : "ir" (~bits));
+	__asm volatile(LOCK " andq %1,%0" :  "=m" (*ptr) : "ir" (~bits));
 }
 
 #define x86_atomic_testset_ul	x86_atomic_testset_u64
diff --git a/sys/arch/amd64/include/bus.h b/sys/arch/amd64/include/bus.h
index 9df8dffa10b..2056c18fda7 100644
--- a/sys/arch/amd64/include/bus.h
+++ b/sys/arch/amd64/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.30 2013/12/12 21:04:50 kettenis Exp $	*/
+/*	$OpenBSD: bus.h,v 1.31 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: bus.h,v 1.6 1996/11/10 03:19:25 thorpej Exp $	*/
 
 /*-
@@ -478,13 +478,13 @@ bus_space_barrier(bus_space_tag_t space, bus_space_handle_t
 {
 	switch (flags) {
 	case (BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE):
-		__asm __volatile("mfence");
+		__asm volatile("mfence");
 		break;
 	case BUS_SPACE_BARRIER_WRITE:
-		__asm __volatile("sfence");
+		__asm volatile("sfence");
 		break;
 	default:
-		__asm __volatile("lfence");
+		__asm volatile("lfence");
 		break;
 	}
 }
diff --git a/sys/arch/amd64/include/cpufunc.h b/sys/arch/amd64/include/cpufunc.h
index f48a3abe807..23f1d51d6b9 100644
--- a/sys/arch/amd64/include/cpufunc.h
+++ b/sys/arch/amd64/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.10 2013/12/06 22:56:20 kettenis Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.11 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: cpufunc.h,v 1.3 2003/05/08 10:27:43 fvdl Exp $	*/
 
 /*-
@@ -54,32 +54,32 @@ extern int cpu_feature;
 static __inline void 
 invlpg(u_int64_t addr)
 { 
-        __asm __volatile("invlpg (%0)" : : "r" (addr) : "memory");
+        __asm volatile("invlpg (%0)" : : "r" (addr) : "memory");
 }  
 
 static __inline void
 lidt(void *p)
 {
-	__asm __volatile("lidt (%0)" : : "r" (p) : "memory");
+	__asm volatile("lidt (%0)" : : "r" (p) : "memory");
 }
 
 static __inline void
 lldt(u_short sel)
 {
-	__asm __volatile("lldt %0" : : "r" (sel));
+	__asm volatile("lldt %0" : : "r" (sel));
 }
 
 static __inline void
 ltr(u_short sel)
 {
-	__asm __volatile("ltr %0" : : "r" (sel));
+	__asm volatile("ltr %0" : : "r" (sel));
 }
 
 static __inline void
 lcr8(u_int val)
 {
 	u_int64_t val64 = val;
-	__asm __volatile("movq %0,%%cr8" : : "r" (val64));
+	__asm volatile("movq %0,%%cr8" : : "r" (val64));
 }
 
 /*
@@ -89,7 +89,7 @@ static __inline void
 lcr0(u_int val)
 {
 	u_int64_t val64 = val;
-	__asm __volatile("movq %0,%%cr0" : : "r" (val64));
+	__asm volatile("movq %0,%%cr0" : : "r" (val64));
 }
 
 static __inline u_int
@@ -97,7 +97,7 @@ rcr0(void)
 {
 	u_int64_t val64;
 	u_int val;
-	__asm __volatile("movq %%cr0,%0" : "=r" (val64));
+	__asm volatile("movq %%cr0,%0" : "=r" (val64));
 	val = val64;
 	return val;
 }
@@ -106,21 +106,21 @@ static __inline u_int64_t
 rcr2(void)
 {
 	u_int64_t val;
-	__asm __volatile("movq %%cr2,%0" : "=r" (val));
+	__asm volatile("movq %%cr2,%0" : "=r" (val));
 	return val;
 }
 
 static __inline void
 lcr3(u_int64_t val)
 {
-	__asm __volatile("movq %0,%%cr3" : : "r" (val));
+	__asm volatile("movq %0,%%cr3" : : "r" (val));
 }
 
 static __inline u_int64_t
 rcr3(void)
 {
 	u_int64_t val;
-	__asm __volatile("movq %%cr3,%0" : "=r" (val));
+	__asm volatile("movq %%cr3,%0" : "=r" (val));
 	return val;
 }
 
@@ -132,7 +132,7 @@ lcr4(u_int val)
 {
 	u_int64_t val64 = val;
 
-	__asm __volatile("movq %0,%%cr4" : : "r" (val64));
+	__asm volatile("movq %0,%%cr4" : : "r" (val64));
 }
 
 static __inline u_int
@@ -140,7 +140,7 @@ rcr4(void)
 {
 	u_int val;
 	u_int64_t val64;
-	__asm __volatile("movq %%cr4,%0" : "=r" (val64));
+	__asm volatile("movq %%cr4,%0" : "=r" (val64));
 	val = val64;
 	return val;
 }
@@ -149,8 +149,8 @@ static __inline void
 tlbflush(void)
 {
 	u_int64_t val;
-	__asm __volatile("movq %%cr3,%0" : "=r" (val));
-	__asm __volatile("movq %0,%%cr3" : : "r" (val));
+	__asm volatile("movq %%cr3,%0" : "=r" (val));
+	__asm volatile("movq %0,%%cr3" : : "r" (val));
 }
 
 static __inline void
@@ -194,13 +194,13 @@ void	setidt(int idx, /*XXX*/caddr_t func, int typ, int dpl);
 static __inline void
 disable_intr(void)
 {
-	__asm __volatile("cli");
+	__asm volatile("cli");
 }
 
 static __inline void
 enable_intr(void)
 {
-	__asm __volatile("sti");
+	__asm volatile("sti");
 }
 
 static __inline u_long
@@ -208,28 +208,28 @@ read_rflags(void)
 {
 	u_long	ef;
 
-	__asm __volatile("pushfq; popq %0" : "=r" (ef));
+	__asm volatile("pushfq; popq %0" : "=r" (ef));
 	return (ef);
 }
 
 static __inline void
 write_rflags(u_long ef)
 {
-	__asm __volatile("pushq %0; popfq" : : "r" (ef));
+	__asm volatile("pushq %0; popfq" : : "r" (ef));
 }
 
 static __inline u_int64_t
 rdmsr(u_int msr)
 {
 	uint32_t hi, lo;
-	__asm __volatile("rdmsr" : "=d" (hi), "=a" (lo) : "c" (msr));
+	__asm volatile("rdmsr" : "=d" (hi), "=a" (lo) : "c" (msr));
 	return (((uint64_t)hi << 32) | (uint64_t) lo);
 }
 
 static __inline void
 wrmsr(u_int msr, u_int64_t newval)
 {
-	__asm __volatile("wrmsr" :
+	__asm volatile("wrmsr" :
 	    : "a" (newval & 0xffffffff), "d" (newval >> 32), "c" (msr));
 }
 
@@ -245,7 +245,7 @@ static __inline u_int64_t
 rdmsr_locked(u_int msr, u_int code)
 {
 	uint32_t hi, lo;
-	__asm __volatile("rdmsr"
+	__asm volatile("rdmsr"
 	    : "=d" (hi), "=a" (lo)
 	    : "c" (msr), "D" (code));
 	return (((uint64_t)hi << 32) | (uint64_t) lo);
@@ -254,26 +254,26 @@ rdmsr_locked(u_int msr, u_int code)
 static __inline void
 wrmsr_locked(u_int msr, u_int code, u_int64_t newval)
 {
-	__asm __volatile("wrmsr" :
+	__asm volatile("wrmsr" :
 	    : "a" (newval & 0xffffffff), "d" (newval >> 32), "c" (msr), "D" (code));
 }
 
 static __inline void
 wbinvd(void)
 {
-	__asm __volatile("wbinvd");
+	__asm volatile("wbinvd");
 }
 
 static __inline void
 clflush(u_int64_t addr)
 {
-	__asm __volatile("clflush %0" : "+m" (*(volatile char *)addr));
+	__asm volatile("clflush %0" : "+m" (*(volatile char *)addr));
 }
 
 static __inline void
 mfence(void)
 {
-	__asm __volatile("mfence" : : : "memory");
+	__asm volatile("mfence" : : : "memory");
 }
 
 static __inline u_int64_t
@@ -281,7 +281,7 @@ rdtsc(void)
 {
 	uint32_t hi, lo;
 
-	__asm __volatile("rdtsc" : "=d" (hi), "=a" (lo));
+	__asm volatile("rdtsc" : "=d" (hi), "=a" (lo));
 	return (((uint64_t)hi << 32) | (uint64_t) lo);
 }
 
@@ -290,7 +290,7 @@ rdpmc(u_int pmc)
 {
 	uint32_t hi, lo;
 
-	__asm __volatile("rdpmc" : "=d" (hi), "=a" (lo) : "c" (pmc));
+	__asm volatile("rdpmc" : "=d" (hi), "=a" (lo) : "c" (pmc));
 	return (((uint64_t)hi << 32) | (uint64_t) lo);
 }
 
@@ -298,7 +298,7 @@ static __inline void
 monitor(const volatile void *addr, u_long extensions, u_int hints)
 {
 
-	__asm __volatile("monitor"
+	__asm volatile("monitor"
 	    : : "a" (addr), "c" (extensions), "d" (hints));
 }
 
@@ -306,14 +306,14 @@ static __inline void
 mwait(u_long extensions, u_int hints)
 {
 
-	__asm __volatile("mwait" : : "a" (hints), "c" (extensions));
+	__asm volatile("mwait" : : "a" (hints), "c" (extensions));
 }
 
 /* Break into DDB/KGDB. */
 static __inline void
 breakpoint(void)
 {
-	__asm __volatile("int $3");
+	__asm volatile("int $3");
 }
 
 #define read_psl()	read_rflags()
diff --git a/sys/arch/amd64/include/intr.h b/sys/arch/amd64/include/intr.h
index e6532369e5c..869d9fe467a 100644
--- a/sys/arch/amd64/include/intr.h
+++ b/sys/arch/amd64/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.25 2013/05/16 16:20:00 kettenis Exp $	*/
+/*	$OpenBSD: intr.h,v 1.26 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: intr.h,v 1.2 2003/05/04 22:01:56 fvdl Exp $	*/
 
 /*-
@@ -123,7 +123,7 @@ void softintr(int);
  * this "instruction", acting as a sequence point for code generation.
  */
 
-#define	__splbarrier() __asm __volatile("":::"memory")
+#define	__splbarrier() __asm volatile("":::"memory")
 
 /*
  * Hardware interrupt masks
diff --git a/sys/arch/amd64/include/lock.h b/sys/arch/amd64/include/lock.h
index 2f63ae4b833..6fe29ddc75f 100644
--- a/sys/arch/amd64/include/lock.h
+++ b/sys/arch/amd64/include/lock.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock.h,v 1.8 2014/03/27 10:24:40 dlg Exp $	*/
+/*	$OpenBSD: lock.h,v 1.9 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: lock.h,v 1.1.2.2 2000/05/03 14:40:55 sommerfeld Exp $	*/
 
 /*-
@@ -45,8 +45,8 @@
  * this "instruction", acting as a sequence point for code generation.
  */
 
-#define __lockbarrier() __asm __volatile("": : :"memory")
-#define SPINLOCK_SPIN_HOOK __asm __volatile("pause": : :"memory");
+#define __lockbarrier() __asm volatile("": : :"memory")
+#define SPINLOCK_SPIN_HOOK __asm volatile("pause": : :"memory");
 
 #include <machine/atomic.h>
 
diff --git a/sys/arch/amd64/include/mutex.h b/sys/arch/amd64/include/mutex.h
index 76623c6dc55..092760840fb 100644
--- a/sys/arch/amd64/include/mutex.h
+++ b/sys/arch/amd64/include/mutex.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.h,v 1.6 2013/06/26 19:53:50 kettenis Exp $	*/
+/*	$OpenBSD: mutex.h,v 1.7 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -30,7 +30,7 @@
 struct mutex {
 	int mtx_wantipl;
 	int mtx_oldipl;
-	__volatile void *mtx_owner;
+	volatile void *mtx_owner;
 };
 
 /*
diff --git a/sys/arch/amd64/include/pctr.h b/sys/arch/amd64/include/pctr.h
index bcaef0814ec..65defd7d32d 100644
--- a/sys/arch/amd64/include/pctr.h
+++ b/sys/arch/amd64/include/pctr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pctr.h,v 1.4 2011/03/23 16:54:34 pirofti Exp $	*/
+/*	$OpenBSD: pctr.h,v 1.5 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Pentium performance counter driver for OpenBSD.
@@ -54,14 +54,14 @@ struct pctrst {
 #define rdtsc()							\
 ({								\
 	u_int32_t hi, lo;					\
-	__asm __volatile("rdtsc" : "=d" (hi), "=a" (lo));	\
+	__asm volatile("rdtsc" : "=d" (hi), "=a" (lo));		\
 	((u_int64_t)hi << 32) | (u_int64_t)lo;			\
 })
 
 #define rdpmc(pmc)						\
 ({								\
 	u_int32_t hi, lo;					\
-	__asm __volatile("rdpmc"				\
+	__asm volatile("rdpmc"					\
 	    : "=d" (hi), "=a" (lo) : "c" (pmc));		\
 	hi &= 0xffffff;						\
 	(((u_int64_t)hi << 32) | (u_int64_t)lo);		\
@@ -72,14 +72,14 @@ struct pctrst {
 #define rdmsr(msr)						\
 ({								\
 	u_int32_t hi, lo;					\
-	__asm __volatile("rdmsr"				\
+	__asm volatile("rdmsr"					\
 	     : "=d" (hi), "=a" (lo) : "c" (msr));		\
 	((u_int64_t)hi << 32) | (u_int64_t) lo;			\
 })
 
 #define wrmsr(msr, v)						\
 ({								\
-	__asm __volatile("wrmsr" :				\
+	__asm volatile("wrmsr" :				\
 	    : "a" ((u_int64_t)v & 0xffffffff),			\
 	      "d" ((u_int64_t)v >> 32), "c" (msr));		\
 })
diff --git a/sys/arch/amd64/include/pio.h b/sys/arch/amd64/include/pio.h
index ddf48d4c6f1..928564c73d8 100644
--- a/sys/arch/amd64/include/pio.h
+++ b/sys/arch/amd64/include/pio.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pio.h,v 1.3 2011/03/23 16:54:34 pirofti Exp $	*/
+/*	$OpenBSD: pio.h,v 1.4 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: pio.h,v 1.2 2003/02/27 11:22:46 fvdl Exp $	*/
 
 /*-
@@ -61,7 +61,7 @@ static __inline u_int8_t
 __inbc(unsigned port)
 {
 	u_int8_t data;
-	__asm __volatile("inb %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inb %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -69,7 +69,7 @@ static __inline u_int8_t
 __inb(unsigned port)
 {
 	u_int8_t data;
-	__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
@@ -78,7 +78,7 @@ insb(unsigned port, void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\tinsb"			:
+	__asm volatile("cld\n\trepne\n\tinsb"			:
 			 "=D" (dummy1), "=c" (dummy2) 		:
 			 "d" (port), "0" (addr), "1" (cnt)	:
 			 "memory");
@@ -91,7 +91,7 @@ static __inline u_int16_t
 __inwc(unsigned port)
 {
 	u_int16_t data;
-	__asm __volatile("inw %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inw %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -99,7 +99,7 @@ static __inline u_int16_t
 __inw(unsigned port)
 {
 	u_int16_t data;
-	__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inw %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
@@ -108,7 +108,7 @@ insw(unsigned port, void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\tinsw"			:
+	__asm volatile("cld\n\trepne\n\tinsw"			:
 			 "=D" (dummy1), "=c" (dummy2)		:
 			 "d" (port), "0" (addr), "1" (cnt)	:
 			 "memory");
@@ -121,7 +121,7 @@ static __inline u_int32_t
 __inlc(unsigned port)
 {
 	u_int32_t data;
-	__asm __volatile("inl %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inl %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -129,7 +129,7 @@ static __inline u_int32_t
 __inl(unsigned port)
 {
 	u_int32_t data;
-	__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inl %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
@@ -138,7 +138,7 @@ insl(unsigned port, void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\tinsl"			:
+	__asm volatile("cld\n\trepne\n\tinsl"			:
 			 "=D" (dummy1), "=c" (dummy2)		:
 			 "d" (port), "0" (addr), "1" (cnt)	:
 			 "memory");
@@ -151,13 +151,13 @@ insl(unsigned port, void *addr, int cnt)
 static __inline void
 __outbc(unsigned port, u_int8_t data)
 {
-	__asm __volatile("outb %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outb %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outb(unsigned port, u_int8_t data)
 {
-	__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outb %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
@@ -165,7 +165,7 @@ outsb(unsigned port, const void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\toutsb"		:
+	__asm volatile("cld\n\trepne\n\toutsb"			:
 			 "=S" (dummy1), "=c" (dummy2)		:
 			 "d" (port), "0" (addr), "1" (cnt));
 }
@@ -177,13 +177,13 @@ outsb(unsigned port, const void *addr, int cnt)
 static __inline void
 __outwc(unsigned port, u_int16_t data)
 {
-	__asm __volatile("outw %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outw %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outw(unsigned port, u_int16_t data)
 {
-	__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outw %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
@@ -191,7 +191,7 @@ outsw(unsigned port, const void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\toutsw"		:
+	__asm volatile("cld\n\trepne\n\toutsw"			:
 			 "=S" (dummy1), "=c" (dummy2)		:
 			 "d" (port), "0" (addr), "1" (cnt));
 }
@@ -203,13 +203,13 @@ outsw(unsigned port, const void *addr, int cnt)
 static __inline void
 __outlc(unsigned port, u_int32_t data)
 {
-	__asm __volatile("outl %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outl %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outl(unsigned port, u_int32_t data)
 {
-	__asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outl %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
@@ -217,7 +217,7 @@ outsl(unsigned port, const void *addr, int cnt)
 {
 	void *dummy1;
 	int dummy2;
-	__asm __volatile("cld\n\trepne\n\toutsl"		:
+	__asm volatile("cld\n\trepne\n\toutsl"			:
 			 "=S" (dummy1), "=c" (dummy2)		:
 			 "d" (port), "0" (addr), "1" (cnt));
 }
diff --git a/sys/arch/amd64/include/proc.h b/sys/arch/amd64/include/proc.h
index 733c93ea5cc..47c93b892a4 100644
--- a/sys/arch/amd64/include/proc.h
+++ b/sys/arch/amd64/include/proc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: proc.h,v 1.7 2011/10/15 23:35:29 guenther Exp $	*/
+/*	$OpenBSD: proc.h,v 1.8 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: proc.h,v 1.1 2003/04/26 18:39:46 fvdl Exp $	*/
 
 /*
@@ -42,7 +42,7 @@ struct trapframe;
 struct mdproc {
 	struct	trapframe *md_regs;	/* registers on current frame */
 	int	md_flags;
-	__volatile int md_astpending;
+	volatile int md_astpending;
 };
 
 /* md_flags */
diff --git a/sys/arch/amd64/isa/clock.c b/sys/arch/amd64/isa/clock.c
index b2f3017cb79..367da948157 100644
--- a/sys/arch/amd64/isa/clock.c
+++ b/sys/arch/amd64/isa/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.20 2013/04/17 18:35:47 gerhard Exp $	*/
+/*	$OpenBSD: clock.c,v 1.21 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: clock.c,v 1.1 2003/04/26 18:39:50 fvdl Exp $	*/
 
 /*-
@@ -259,10 +259,10 @@ i8254_delay(int n)
 		 * quantity to prevent loss of significance.
 		 */
 		int m;
-		__asm __volatile("mul %3"
+		__asm volatile("mul %3"
 				 : "=a" (n), "=d" (m)
 				 : "0" (n), "r" (TIMER_FREQ));
-		__asm __volatile("div %4"
+		__asm volatile("div %4"
 				 : "=a" (n), "=d" (m)
 				 : "0" (n), "1" (m), "r" (1000000));
 #else
diff --git a/sys/arch/amd64/stand/libsa/bioscons.c b/sys/arch/amd64/stand/libsa/bioscons.c
index 2e2bbb4ed16..bdff9a4b67e 100644
--- a/sys/arch/amd64/stand/libsa/bioscons.c
+++ b/sys/arch/amd64/stand/libsa/bioscons.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bioscons.c,v 1.9 2013/01/17 12:07:19 jsing Exp $	*/
+/*	$OpenBSD: bioscons.c,v 1.10 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-1999 Michael Shalayeff
@@ -77,7 +77,7 @@ pc_getc(dev_t dev)
 	register int rv;
 
 	if (dev & 0x80) {
-		__asm __volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
+		__asm volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
 		    "0" (0x100) : "%ecx", "%edx", "cc" );
 		return (rv & 0xff);
 	}
@@ -87,11 +87,11 @@ pc_getc(dev_t dev)
 	 * be necessary on (at least) the Intel Mac Mini.
 	 */
 	do {
-		__asm __volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
+		__asm volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
 		    "0" (0x100) : "%ecx", "%edx", "cc" );
 	} while ((rv & 0xff) == 0);
 
-	__asm __volatile(DOINT(0x16) : "=a" (rv) : "0" (0x000) :
+	__asm volatile(DOINT(0x16) : "=a" (rv) : "0" (0x000) :
 	    "%ecx", "%edx", "cc" );
 
 	return (rv & 0xff);
@@ -102,7 +102,7 @@ pc_getshifts(dev_t dev)
 {
 	register int rv;
 
-	__asm __volatile(DOINT(0x16) : "=a" (rv) : "0" (0x200) :
+	__asm volatile(DOINT(0x16) : "=a" (rv) : "0" (0x200) :
 	    "%ecx", "%edx", "cc" );
 
 	return (rv & 0xff);
@@ -111,7 +111,7 @@ pc_getshifts(dev_t dev)
 void
 pc_putc(dev_t dev, int c)
 {
-	__asm __volatile(DOINT(0x10) : : "a" (c | 0xe00), "b" (1) :
+	__asm volatile(DOINT(0x10) : : "a" (c | 0xe00), "b" (1) :
 	    "%ecx", "%edx", "cc" );
 }
 
@@ -123,7 +123,7 @@ com_probe(struct consdev *cn)
 	register int i, n;
 
 	/* get equip. (9-11 # of coms) */
-	__asm __volatile(DOINT(0x11) : "=a" (n) : : "%ecx", "%edx", "cc");
+	__asm volatile(DOINT(0x11) : "=a" (n) : : "%ecx", "%edx", "cc");
 	n >>= 9;
 	n &= 7;
 	for (i = 0; i < n; i++)
diff --git a/sys/arch/amd64/stand/libsa/biosdev.c b/sys/arch/amd64/stand/libsa/biosdev.c
index 379592bf964..f74090151e1 100644
--- a/sys/arch/amd64/stand/libsa/biosdev.c
+++ b/sys/arch/amd64/stand/libsa/biosdev.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: biosdev.c,v 1.21 2013/12/28 02:40:41 jsing Exp $	*/
+/*	$OpenBSD: biosdev.c,v 1.22 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 1996 Michael Shalayeff
@@ -75,7 +75,7 @@ biosdreset(int dev)
 {
 	int rv;
 
-	__asm __volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
+	__asm volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
 	    : "0" (0), "d" (dev) : "%ecx", "cc");
 
 	return ((rv & 0xff)? rv >> 8 : 0);
@@ -98,7 +98,7 @@ bios_getdiskinfo(int dev, bios_diskinfo_t *pdi)
 	if (debug)
 		printf("getinfo: try #8, 0x%x, %p\n", dev, pdi);
 #endif
-	__asm __volatile (DOINT(0x13) "\n\t"
+	__asm volatile (DOINT(0x13) "\n\t"
 	    "setc %b0; movzbl %h1, %1\n\t"
 	    "movzbl %%cl, %3; andb $0x3f, %b3\n\t"
 	    "xchgb %%cl, %%ch; rolb $2, %%ch"
@@ -141,7 +141,7 @@ bios_getdiskinfo(int dev, bios_diskinfo_t *pdi)
 			printf("getinfo: try #41, 0x%x\n", dev);
 #endif
 		/* EDD support check */
-		__asm __volatile(DOINT(0x13) "; setc %b0"
+		__asm volatile(DOINT(0x13) "; setc %b0"
 			 : "=a" (rv), "=c" (bm)
 			 : "0" (0x4100), "b" (0x55aa), "d" (dev) : "cc");
 		if (!(rv & 0xff) && (BIOS_regs.biosr_bx & 0xffff) == 0xaa55)
@@ -189,7 +189,7 @@ CHS_rw(int rw, int dev, int cyl, int head, int sect, int nsect, void *buf)
 
 	rw = rw == F_READ ? 2 : 3;
 	BIOS_regs.biosr_es = (u_int32_t)buf >> 4;
-	__asm __volatile ("movb %b7, %h1\n\t"
+	__asm volatile ("movb %b7, %h1\n\t"
 	    "movb %b6, %%dh\n\t"
 	    "andl $0xf, %4\n\t"
 	    /* cylinder; the highest 2 bits of cyl is in %cl */
@@ -231,7 +231,7 @@ EDD_rw(int rw, int dev, u_int32_t daddr, u_int32_t nblk, void *buf)
 
 	/* Call extended read/write (with disk packet) */
 	BIOS_regs.biosr_ds = (u_int32_t)&cb >> 4;
-	__asm __volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
+	__asm volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
 	    : "0" ((rw == F_READ)? 0x4200: 0x4300),
 	      "d" (dev), "S" ((int) (&cb) & 0xf) : "%ecx", "cc");
 	return ((rv & 0xff)? rv >> 8 : 0);
diff --git a/sys/arch/amd64/stand/libsa/biosprobe.c b/sys/arch/amd64/stand/libsa/biosprobe.c
index f82360a0e54..c598d74794f 100644
--- a/sys/arch/amd64/stand/libsa/biosprobe.c
+++ b/sys/arch/amd64/stand/libsa/biosprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: biosprobe.c,v 1.2 2012/10/30 14:06:29 jsing Exp $	*/
+/*	$OpenBSD: biosprobe.c,v 1.3 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 2002 Tobias Weingartner
@@ -41,7 +41,7 @@ getSYSCONFaddr(void)
 	u_int32_t status;
 	u_int8_t *vers;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %%al\n\t"
 	    : "=a" (status)
 	    : "0" (0xC000)
@@ -67,7 +67,7 @@ getEBDAaddr(void)
 	if (!info)
 		return NULL;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %%al"
 	    : "=a" (status)
 	    : "0" (0xC100)
diff --git a/sys/arch/amd64/stand/libsa/memprobe.c b/sys/arch/amd64/stand/libsa/memprobe.c
index fd331e6608d..9120fee935e 100644
--- a/sys/arch/amd64/stand/libsa/memprobe.c
+++ b/sys/arch/amd64/stand/libsa/memprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: memprobe.c,v 1.12 2013/03/21 21:51:00 deraadt Exp $	*/
+/*	$OpenBSD: memprobe.c,v 1.13 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-1999 Michael Shalayeff
@@ -73,7 +73,7 @@ bios_E820(bios_memmap_t *mp)
 
 	do {
 		BIOS_regs.biosr_es = ((u_int)(mp) >> 4);
-		__asm __volatile(DOINT(0x15) "; setc %b1"
+		__asm volatile(DOINT(0x15) "; setc %b1"
 		    : "=a" (sig), "=d" (rc), "=b" (off)
 		    : "0" (0xE820), "1" (0x534d4150), "b" (off),
 		      "c" (sizeof(*mp)), "D" (((u_int)mp) & 0xf)
@@ -125,7 +125,7 @@ bios_E801(bios_memmap_t *mp)
 		return NULL;
 
 	/* We might have this call */
-	__asm __volatile(DOINT(0x15) "; mov %%ax, %%si; setc %b0"
+	__asm volatile(DOINT(0x15) "; mov %%ax, %%si; setc %b0"
 	    : "=a" (rc), "=S" (m1), "=b" (m2), "=c" (m3), "=d" (m4)
 	    : "0" (0xE801));
 
@@ -166,7 +166,7 @@ bios_8800(bios_memmap_t *mp)
 {
 	int rc, mem;
 
-	__asm __volatile(DOINT(0x15) "; setc %b0"
+	__asm volatile(DOINT(0x15) "; setc %b0"
 	    : "=c" (rc), "=a" (mem) : "a" (0x8800));
 
 	if (rc & 0xff)
@@ -194,7 +194,7 @@ bios_int12(bios_memmap_t *mp)
 #ifdef DEBUG
 	printf("0x12 ");
 #endif
-	__asm __volatile(DOINT(0x12) : "=a" (mem) :: "%ecx", "%edx", "cc");
+	__asm volatile(DOINT(0x12) : "=a" (mem) :: "%ecx", "%edx", "cc");
 
 	/* Fill out a bios_memmap_t */
 	mp->addr = 0;
@@ -227,7 +227,7 @@ const u_int addrprobe_pat[] = {
 static int
 addrprobe(u_int kloc)
 {
-	__volatile u_int *loc;
+	volatile u_int *loc;
 	register u_int i, ret = 0;
 	u_int save[nitems(addrprobe_pat)];
 
diff --git a/sys/arch/amd64/stand/libsa/time.c b/sys/arch/amd64/stand/libsa/time.c
index 42c00737565..d502d8a901d 100644
--- a/sys/arch/amd64/stand/libsa/time.c
+++ b/sys/arch/amd64/stand/libsa/time.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: time.c,v 1.3 2012/10/30 14:06:29 jsing Exp $	*/
+/*	$OpenBSD: time.c,v 1.4 2014/03/29 18:09:28 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997 Michael Shalayeff
@@ -76,7 +76,7 @@ compute(int year, u_int8_t month, u_int8_t day, u_int8_t hour,
 static int
 bios_time_date(int f, u_int8_t *b)
 {
-	__asm __volatile(DOINT(0x1a) "\n\t"
+	__asm volatile(DOINT(0x1a) "\n\t"
 	    "setc %b0\n\t"
 	    "movb %%ch, 0(%2)\n\t"
 	    "movb %%cl, 1(%2)\n\t"
diff --git a/sys/arch/arm/arm/cpu.c b/sys/arch/arm/arm/cpu.c
index acf9cc6d350..fe1c76f522e 100644
--- a/sys/arch/arm/arm/cpu.c
+++ b/sys/arch/arm/arm/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.17 2013/08/06 23:15:43 jsg Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.18 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: cpu.c,v 1.56 2004/04/14 04:01:49 bsh Exp $	*/
 
 
@@ -570,7 +570,7 @@ cpu_alloc_idlepcb(struct cpu_info *ci)
  * on the CPU.
  */
 void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int oldirqstate;
 	oldirqstate = disable_interrupts(I32_bit|F32_bit);
@@ -579,7 +579,7 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int oldirqstate;
 	oldirqstate = disable_interrupts(I32_bit|F32_bit);
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c
index 557519098e5..7a8a47135cf 100644
--- a/sys/arch/arm/arm/cpufunc.c
+++ b/sys/arch/arm/arm/cpufunc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.c,v 1.24 2013/09/03 16:48:26 patrick Exp $	*/
+/*	$OpenBSD: cpufunc.c,v 1.25 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $	*/
 
 /*
@@ -641,7 +641,7 @@ get_cachetype_cp15()
 	u_int ctype, isize, dsize;
 	u_int multiplier;
 
-	__asm __volatile("mrc p15, 0, %0, c0, c0, 1"
+	__asm volatile("mrc p15, 0, %0, c0, c0, 1"
 		: "=r" (ctype));
 
 	/*
@@ -786,7 +786,7 @@ arm_get_cachetype_cp15v7(void)
 	uint32_t sel, level;
 
 	/* CLIDR - Cache Level ID Register */
-	__asm __volatile("mrc p15, 1, %0, c0, c0, 1"
+	__asm volatile("mrc p15, 1, %0, c0, c0, 1"
 		: "=r" (cache_level_id) :);
 	cpu_drain_writebuf();
 
@@ -802,11 +802,11 @@ arm_get_cachetype_cp15v7(void)
 		    cache_level_id & (0x2 << level)) {
 			sel = level << 1 | 0 << 0; /* L1 | unified/data cache */
 			/* CSSELR - Cache Size Selection Register */
-			__asm __volatile("mcr p15, 2, %0, c0, c0, 0"
+			__asm volatile("mcr p15, 2, %0, c0, c0, 0"
 				:: "r" (sel));
 			cpu_drain_writebuf();
 			/* CCSIDR - Cache Size Identification Register */
-			__asm __volatile("mrc p15, 1, %0, c0, c0, 0"
+			__asm volatile("mrc p15, 1, %0, c0, c0, 0"
 			: "=r" (cachereg) :);
 			cpu_drain_writebuf();
 			sets = ((cachereg >> 13) & 0x7fff) + 1;
@@ -831,11 +831,11 @@ arm_get_cachetype_cp15v7(void)
 		if (cache_level_id & (0x1 << level)) {
 			sel = level << 1 | 1 << 0; /* L1 | instruction cache */
 			/* CSSELR - Cache Size Selection Register */
-			__asm __volatile("mcr p15, 2, %0, c0, c0, 0"
+			__asm volatile("mcr p15, 2, %0, c0, c0, 0"
 				:: "r" (sel));
 			cpu_drain_writebuf();
 			/* CCSIDR - Cache Size Identification Register */
-			__asm __volatile("mrc p15, 1, %0, c0, c0, 0"
+			__asm volatile("mrc p15, 1, %0, c0, c0, 0"
 			: "=r" (cachereg) :);
 			cpu_drain_writebuf();
 			sets = ((cachereg >> 13) & 0x7fff) + 1;
@@ -860,7 +860,7 @@ armv7_idcache_wbinv_all()
 {
 	uint32_t arg;
 	arg = 0;
-	__asm __volatile("mcr	p15, 0, r0, c7, c5, 0" :: "r" (arg));
+	__asm volatile("mcr	p15, 0, r0, c7, c5, 0" :: "r" (arg));
 	armv7_dcache_wbinv_all();
 }
 /* brute force cache flushing */
@@ -892,7 +892,7 @@ armv7_dcache_wbinv_all()
 			word = wayval | setval | lvl;
 
 			/* Clean D cache SE with Set/Index */
-			__asm __volatile("mcr	p15, 0, %0, c7, c10, 2"
+			__asm volatile("mcr	p15, 0, %0, c7, c10, 2"
 			    : : "r" (word));
 			wayval += wayincr;
 		}
@@ -1067,7 +1067,7 @@ set_cpufuncs()
 		 *	- overflow indications cleared
 		 *	- all counters disabled
 		 */
-		__asm __volatile("mcr p14, 0, %0, c0, c0, 0"
+		__asm volatile("mcr p14, 0, %0, c0, c0, 0"
 			:
 			: "r" (PMNC_P|PMNC_C|PMNC_PMN0_IF|PMNC_PMN1_IF|
 			       PMNC_CC_IF));
@@ -1077,7 +1077,7 @@ set_cpufuncs()
 		/*
 		 * Crank CCLKCFG to maximum legal value.
 		 */
-		__asm __volatile ("mcr p14, 0, %0, c6, c0, 0"
+		__asm volatile ("mcr p14, 0, %0, c6, c0, 0"
 			:
 			: "r" (XSCALE_CCLKCFG));
 #endif
@@ -1087,7 +1087,7 @@ set_cpufuncs()
 		 * don't really support it, yet.  Clear any pending
 		 * error indications.
 		 */
-		__asm __volatile("mcr p13, 0, %0, c0, c1, 0"
+		__asm volatile("mcr p13, 0, %0, c0, c1, 0"
 			:
 			: "r" (BCUCTL_E0|BCUCTL_E1|BCUCTL_EV));
 
@@ -1126,7 +1126,7 @@ set_cpufuncs()
 		 *	- overflow indications cleared
 		 *	- all counters disabled
 		 */
-		__asm __volatile("mcr p14, 0, %0, c0, c0, 0"
+		__asm volatile("mcr p14, 0, %0, c0, c0, 0"
 			:
 			: "r" (PMNC_P|PMNC_C|PMNC_PMN0_IF|PMNC_PMN1_IF|
 			       PMNC_CC_IF));
@@ -1282,7 +1282,7 @@ arm9e_setup()
 	cpu_idcache_wbinv_all();
 
 	/* Now really make sure they are clean.  */
-	__asm __volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
+	__asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
 
 	/* Set the control register */
 	curcpu()->ci_ctrl = cpuctrl;
@@ -1300,7 +1300,7 @@ arm10_setup()
 	arm9e_setup();
 
 	/* Allow detection code to find the VFP if it's fitted.  */
-	__asm __volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff));
+	__asm volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff));
 }
 #endif	/* CPU_ARM10 */
 
@@ -1473,14 +1473,14 @@ xscale_setup()
 	cpu_control(0xffffffff, cpuctrl);
 
 	/* Make sure write coalescing is turned on */
-	__asm __volatile("mrc p15, 0, %0, c1, c0, 1"
+	__asm volatile("mrc p15, 0, %0, c1, c0, 1"
 		: "=r" (auxctl));
 #ifdef XSCALE_NO_COALESCE_WRITES
 	auxctl |= XSCALE_AUXCTL_K;
 #else
 	auxctl &= ~XSCALE_AUXCTL_K;
 #endif
-	__asm __volatile("mcr p15, 0, %0, c1, c0, 1"
+	__asm volatile("mcr p15, 0, %0, c1, c0, 1"
 		: : "r" (auxctl));
 }
 #endif	/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
diff --git a/sys/arch/arm/arm/pmap.c b/sys/arch/arm/arm/pmap.c
index 4daa4285936..f40fbdf642b 100644
--- a/sys/arch/arm/arm/pmap.c
+++ b/sys/arch/arm/arm/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.45 2013/11/04 00:35:30 dlg Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.46 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: pmap.c,v 1.147 2004/01/18 13:03:50 scw Exp $	*/
 
 /*
@@ -3002,8 +3002,8 @@ pmap_activate(struct proc *p)
 	if (p == curproc) {
 		u_int cur_dacr, cur_ttb;
 
-		__asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
-		__asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
+		__asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
+		__asm volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
 
 		cur_ttb &= ~(L1_TABLE_SIZE - 1);
 
@@ -4767,9 +4767,9 @@ pmap_pte_init_armv7(void)
 	pmap_copy_page_func = pmap_copy_page_v7;
 
 	/* probe L1 dcache */
-	__asm __volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (0) );
+	__asm volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (0) );
 	/* read the arm v7 cache control register, is writhru is supported? */
-	__asm __volatile("mrc p15, 1, %0, c0, c0, 0"
+	__asm volatile("mrc p15, 1, %0, c0, c0, 0"
 		: "=r" (cachereg) :);
 
 	if ((cachereg & 0x80000000) == 0)
@@ -4902,9 +4902,9 @@ pmap_pte_init_xscale(void)
 	/*
 	 * Disable ECC protection of page table access, for now.
 	 */
-	__asm __volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
+	__asm volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
 	auxctl &= ~XSCALE_AUXCTL_P;
-	__asm __volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
+	__asm volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
 
 	pmap_needs_pte_sync = 1;
 }
@@ -4966,10 +4966,10 @@ xscale_setup_minidata(vaddr_t l1pt, vaddr_t va, paddr_t pa)
 	 */
 
 	/* Invalidate data and mini-data. */
-	__asm __volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
-	__asm __volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
+	__asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
+	__asm volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
 	auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA;
-	__asm __volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
+	__asm volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
 }
 
 /*
diff --git a/sys/arch/arm/arm/pmap7.c b/sys/arch/arm/arm/pmap7.c
index 909406bb48a..14a4c3aae31 100644
--- a/sys/arch/arm/arm/pmap7.c
+++ b/sys/arch/arm/arm/pmap7.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap7.c,v 1.12 2013/11/04 00:35:30 dlg Exp $	*/
+/*	$OpenBSD: pmap7.c,v 1.13 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: pmap.c,v 1.147 2004/01/18 13:03:50 scw Exp $	*/
 
 /*
@@ -735,7 +735,7 @@ pmap_free_l1(pmap_t pm)
 {
 	u_int cur_ttb;
 
-	__asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
+	__asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
 	cur_ttb &= ~(L1_TABLE_SIZE - 1);
 
 }
@@ -2241,8 +2241,8 @@ pmap_activate(struct proc *p)
 	if (p == curproc) {
 		u_int cur_dacr, cur_ttb;
 
-		__asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
-		__asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
+		__asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
+		__asm volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
 
 		cur_ttb &= ~(L1_TABLE_SIZE - 1);
 
@@ -3517,8 +3517,8 @@ pmap_pte_init_armv7(void)
 	pte_l2_s_proto = L2_S_PROTO_v7;
 
 	/* probe L1 dcache */
-	__asm __volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (0) );
-	__asm __volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (cachereg) );
+	__asm volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (0) );
+	__asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (cachereg) );
 	if ((cachereg & 0x80000000) == 0) {
 #if 0
 		/*
diff --git a/sys/arch/arm/include/atomic.h b/sys/arch/arm/include/atomic.h
index 5b2de71e43b..83f3a42c6d8 100644
--- a/sys/arch/arm/include/atomic.h
+++ b/sys/arch/arm/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.8 2011/03/23 16:54:34 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.9 2014/03/29 18:09:28 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -12,8 +12,8 @@
  * in the kernel and atomic updates are necessary without full mutexes
  */
 
-void atomic_setbits_int(__volatile unsigned int *, unsigned int);
-void atomic_clearbits_int(__volatile unsigned int *, unsigned int);
+void atomic_setbits_int(volatile unsigned int *, unsigned int);
+void atomic_clearbits_int(volatile unsigned int *, unsigned int);
 
 #endif /* defined(_KERNEL) */
 #endif /* _ARM_ATOMIC_H_ */
diff --git a/sys/arch/arm/include/cpufunc.h b/sys/arch/arm/include/cpufunc.h
index d76f3de5786..43753ac52ab 100644
--- a/sys/arch/arm/include/cpufunc.h
+++ b/sys/arch/arm/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.14 2013/03/30 01:30:30 patrick Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.15 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: cpufunc.h,v 1.29 2003/09/06 09:08:35 rearnsha Exp $	*/
 
 /*
@@ -479,7 +479,7 @@ __set_cpsr_c(u_int bic, u_int eor)
 {
 	u_int32_t	tmp, ret;
 
-	__asm __volatile(
+	__asm volatile(
 		"mrs	%0, cpsr\n\t"	/* Get the CPSR */
 		"bic	%1, %0, %2\n\t"	/* Clear bits */
 		"eor	%1, %1, %3\n\t"	/* XOR bits */
@@ -495,7 +495,7 @@ __get_cpsr()
 {
 	u_int32_t	ret;
 
-	__asm __volatile("mrs	%0, cpsr" : "=&r" (ret));
+	__asm volatile("mrs	%0, cpsr" : "=&r" (ret));
 
 	return ret;
 }
diff --git a/sys/arch/arm/include/lock.h b/sys/arch/arm/include/lock.h
index d8d581eb1c1..cf4b7e4ca38 100644
--- a/sys/arch/arm/include/lock.h
+++ b/sys/arch/arm/include/lock.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock.h,v 1.4 2010/04/21 03:03:25 deraadt Exp $	*/
+/*	$OpenBSD: lock.h,v 1.5 2014/03/29 18:09:28 guenther Exp $	*/
 /*	$NetBSD: lock.h,v 1.3 2002/10/07 23:19:49 bjh21 Exp $	*/
 
 /*-
@@ -44,16 +44,16 @@
 
 #include <arm/atomic.h>
 
-typedef __volatile int          __cpu_simple_lock_t;
+typedef volatile int		__cpu_simple_lock_t;
 
 #define __SIMPLELOCK_LOCKED     1
 #define __SIMPLELOCK_UNLOCKED   0
 
 static __inline int
-__swp(int __val, __volatile int *__ptr)
+__swp(int __val, volatile int *__ptr)
 {
 
-	__asm __volatile("swp %0, %1, [%2]"
+	__asm volatile("swp %0, %1, [%2]"
 	    : "=r" (__val) : "r" (__val), "r" (__ptr) : "memory");
 	return __val;
 }
diff --git a/sys/arch/arm/xscale/i80321_intr.c b/sys/arch/arm/xscale/i80321_intr.c
index 58e032074b7..d5e4f1f6417 100644
--- a/sys/arch/arm/xscale/i80321_intr.c
+++ b/sys/arch/arm/xscale/i80321_intr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i80321_intr.c,v 1.14 2010/09/20 06:33:47 matthew Exp $ */
+/* $OpenBSD: i80321_intr.c,v 1.15 2014/03/29 18:09:28 guenther Exp $ */
 
 /*
  * Copyright (c) 2006 Dale Rahn <drahn@openbsd.org>
@@ -50,8 +50,8 @@ uint32_t	i80321intc_smask[NIPL];
 
 #define SI_TO_IRQBIT(x)	(1 << (x))
 
-__volatile int current_ipl_level;
-__volatile int softint_pending;
+volatile int current_ipl_level;
+volatile int softint_pending;
 
 struct cfattach i80321intc_ca = {
 	sizeof(struct device), i80321intc_match, i80321intc_attach
diff --git a/sys/arch/arm/xscale/pxa2x0.c b/sys/arch/arm/xscale/pxa2x0.c
index 9b9528c66c2..25b517de205 100644
--- a/sys/arch/arm/xscale/pxa2x0.c
+++ b/sys/arch/arm/xscale/pxa2x0.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0.c,v 1.17 2013/05/30 16:15:01 deraadt Exp $ */
+/*	$OpenBSD: pxa2x0.c,v 1.18 2014/03/29 18:09:28 guenther Exp $ */
 /*	$NetBSD: pxa2x0.c,v 1.5 2003/12/12 16:42:44 thorpej Exp $ */
 
 /*
@@ -272,7 +272,7 @@ static inline uint32_t
 read_clock_counter(void)
 {
   uint32_t x;
-  __asm __volatile("mrc	p14, 0, %0, c1, c1, 0" : "=r" (x));
+  __asm volatile("mrc	p14, 0, %0, c1, c1, 0" : "=r" (x));
 
   return x;
 }
@@ -288,9 +288,9 @@ pxaip_measure_cpuclock(struct pxaip_softc *sc)
 	ioh = sc->sc_bush_rtc;
 	irq = disable_interrupts(I32_bit|F32_bit);
 
-	__asm __volatile( "mrc p14, 0, %0, c0, c1, 0" : "=r" (pmcr_save));
+	__asm volatile( "mrc p14, 0, %0, c0, c1, 0" : "=r" (pmcr_save));
 	/* Enable clock counter */
-	__asm __volatile( "mcr p14, 0, %0, c0, c1, 0" : : "r" (0x0001));
+	__asm volatile( "mcr p14, 0, %0, c0, c1, 0" : : "r" (0x0001));
 
 	rtc0 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR);
 	/* Wait for next second starts */
@@ -301,7 +301,7 @@ pxaip_measure_cpuclock(struct pxaip_softc *sc)
 		;		/* Wait for 1sec */
 	end = read_clock_counter();
 
-	__asm __volatile( "mcr p14, 0, %0, c0, c1, 0" : : "r" (pmcr_save));
+	__asm volatile( "mcr p14, 0, %0, c0, c1, 0" : : "r" (pmcr_save));
 	restore_interrupts(irq);
 
 	return end - start;
@@ -310,7 +310,7 @@ pxaip_measure_cpuclock(struct pxaip_softc *sc)
 void
 pxa2x0_turbo_mode(int f)
 {
-	__asm __volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f));
+	__asm volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f));
 }
 
 void
diff --git a/sys/arch/arm/xscale/pxa2x0_intr.c b/sys/arch/arm/xscale/pxa2x0_intr.c
index e438498515c..d1b0798cb9f 100644
--- a/sys/arch/arm/xscale/pxa2x0_intr.c
+++ b/sys/arch/arm/xscale/pxa2x0_intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0_intr.c,v 1.23 2012/12/05 23:20:11 deraadt Exp $ */
+/*	$OpenBSD: pxa2x0_intr.c,v 1.24 2014/03/29 18:09:28 guenther Exp $ */
 /*	$NetBSD: pxa2x0_intr.c,v 1.5 2003/07/15 00:24:55 lukem Exp $	*/
 
 /*
@@ -110,8 +110,8 @@ static struct intrhandler{
 #endif
 } handler[ICU_LEN];
 
-__volatile int softint_pending;
-__volatile int current_spl_level;
+volatile int softint_pending;
+volatile int current_spl_level;
 /* interrupt masks for each level */
 int pxa2x0_imask[NIPL];
 static int extirq_level[ICU_LEN];
diff --git a/sys/arch/arm/xscale/pxa2x0_intr.h b/sys/arch/arm/xscale/pxa2x0_intr.h
index d14a8a8ba59..71478df5872 100644
--- a/sys/arch/arm/xscale/pxa2x0_intr.h
+++ b/sys/arch/arm/xscale/pxa2x0_intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0_intr.h,v 1.13 2009/08/26 20:31:43 deraadt Exp $ */
+/*	$OpenBSD: pxa2x0_intr.h,v 1.14 2014/03/29 18:09:28 guenther Exp $ */
 /*	$NetBSD: pxa2x0_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */
 
 /* Derived from i80321_intr.h */
@@ -54,8 +54,8 @@ extern vaddr_t pxaic_base;		/* Shared with pxa2x0_irq.S */
 #define write_icu(offset,value) \
  (*(volatile uint32_t *)(pxaic_base+(offset))=(value))
 
-extern __volatile int current_spl_level;
-extern __volatile int softint_pending;
+extern volatile int current_spl_level;
+extern volatile int softint_pending;
 extern int pxa2x0_imask[];
 void pxa2x0_do_pending(void);
 
diff --git a/sys/arch/armish/include/armish_intr.h b/sys/arch/armish/include/armish_intr.h
index 78f8b1a6931..aed25c169c1 100644
--- a/sys/arch/armish/include/armish_intr.h
+++ b/sys/arch/armish/include/armish_intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: armish_intr.h,v 1.7 2011/03/23 16:54:34 pirofti Exp $ */
+/*	$OpenBSD: armish_intr.h,v 1.8 2014/03/29 18:09:28 guenther Exp $ */
 /*	$NetBSD: i80321_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */
 
 /*
@@ -47,8 +47,8 @@
 #include <arm/cpufunc.h>
 #include <arm/softintr.h>
 
-extern __volatile int current_ipl_level;
-extern __volatile int softint_pending;
+extern volatile int current_ipl_level;
+extern volatile int softint_pending;
 extern int i80321_imask[];
 void i80321_do_pending(void);
 
diff --git a/sys/arch/armv7/armv7/armv7_machdep.c b/sys/arch/armv7/armv7/armv7_machdep.c
index bbc53753390..3ac90c7f9b6 100644
--- a/sys/arch/armv7/armv7/armv7_machdep.c
+++ b/sys/arch/armv7/armv7/armv7_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: armv7_machdep.c,v 1.5 2014/03/13 03:52:55 dlg Exp $ */
+/*	$OpenBSD: armv7_machdep.c,v 1.6 2014/03/29 18:09:28 guenther Exp $ */
 /*	$NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */
 
 /*
@@ -333,7 +333,7 @@ read_ttb(void)
 {
   long ttb;
 
-  __asm __volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
+  __asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
 
 
   return (pd_entry_t *)(ttb & ~((1<<14)-1));
diff --git a/sys/arch/armv7/omap/intc.h b/sys/arch/armv7/omap/intc.h
index afb54dd41a3..bc0a59f514a 100644
--- a/sys/arch/armv7/omap/intc.h
+++ b/sys/arch/armv7/omap/intc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intc.h,v 1.1 2013/09/04 14:38:30 patrick Exp $ */
+/*	$OpenBSD: intc.h,v 1.2 2014/03/29 18:09:28 guenther Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  *
@@ -25,8 +25,8 @@
 #include <machine/intr.h>
 #include <arm/softintr.h>
 
-extern __volatile int current_spl_level;
-extern __volatile int softint_pending;
+extern volatile int current_spl_level;
+extern volatile int softint_pending;
 void intc_do_pending(void);
 
 #define SI_TO_IRQBIT(si)  (1U<<(si))
diff --git a/sys/arch/armv7/sunxi/a1xintc.h b/sys/arch/armv7/sunxi/a1xintc.h
index a97e7b6b2d2..1d0bebb57f6 100644
--- a/sys/arch/armv7/sunxi/a1xintc.h
+++ b/sys/arch/armv7/sunxi/a1xintc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: a1xintc.h,v 1.1 2013/10/23 17:08:47 jasper Exp $ */
+/*	$OpenBSD: a1xintc.h,v 1.2 2014/03/29 18:09:29 guenther Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  *
@@ -25,8 +25,8 @@
 #include <machine/intr.h>
 #include <arm/softintr.h>
 
-extern __volatile int current_spl_level;
-extern __volatile int softint_pending;
+extern volatile int current_spl_level;
+extern volatile int softint_pending;
 void intc_do_pending(void);
 
 #define SI_TO_IRQBIT(si)  (1U<<(si))
diff --git a/sys/arch/aviion/aviion/prom.c b/sys/arch/aviion/aviion/prom.c
index 9b4a2cf25f9..003e2959b3e 100644
--- a/sys/arch/aviion/aviion/prom.c
+++ b/sys/arch/aviion/aviion/prom.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: prom.c,v 1.7 2013/10/07 19:10:40 miod Exp $	*/
+/*	$OpenBSD: prom.c,v 1.8 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2006, Miodrag Vallat.
@@ -43,28 +43,28 @@ register_t prom_vbr;					/* set in locore.S */
 	register_t ossr0, ossr1, ossr2, ossr3
 
 #define	SCM_CALL(x) \
-	__asm__ __volatile__ ("or %r9, %r0, " __STRING(x));		\
-	__asm__ __volatile__ ("tb0 0, %%r0, 496" :::			\
+	__asm__ volatile ("or %r9, %r0, " __STRING(x));			\
+	__asm__ volatile ("tb0 0, %%r0, 496" :::			\
 	    "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",		\
 	    "r9", "r10", "r11", "r12", "r13")
 
 #define	SCM_VBR() \
-	__asm__ __volatile__ ("stcr %0, %%cr7" : : "r" (prom_vbr))
+	__asm__ volatile ("stcr %0, %%cr7" : : "r" (prom_vbr))
 
 #define	SCM_CONTEXT() \
-	__asm__ __volatile__ ("ldcr %0, %%cr17" : "=r" (ossr0)); \
-	__asm__ __volatile__ ("ldcr %0, %%cr18" : "=r" (ossr1)); \
-	__asm__ __volatile__ ("ldcr %0, %%cr19" : "=r" (ossr2)); \
-	__asm__ __volatile__ ("ldcr %0, %%cr20" : "=r" (ossr3))
+	__asm__ volatile ("ldcr %0, %%cr17" : "=r" (ossr0)); \
+	__asm__ volatile ("ldcr %0, %%cr18" : "=r" (ossr1)); \
+	__asm__ volatile ("ldcr %0, %%cr19" : "=r" (ossr2)); \
+	__asm__ volatile ("ldcr %0, %%cr20" : "=r" (ossr3))
 
 #define	OS_VBR() \
-	__asm__ __volatile__ ("stcr %0, %%cr7" : : "r" (kernel_vbr))
+	__asm__ volatile ("stcr %0, %%cr7" : : "r" (kernel_vbr))
 
 #define	OS_CONTEXT() \
-	__asm__ __volatile__ ("stcr %0, %%cr17" : : "r" (ossr0)); \
-	__asm__ __volatile__ ("stcr %0, %%cr18" : : "r" (ossr1)); \
-	__asm__ __volatile__ ("stcr %0, %%cr19" : : "r" (ossr2)); \
-	__asm__ __volatile__ ("stcr %0, %%cr20" : : "r" (ossr3))
+	__asm__ volatile ("stcr %0, %%cr17" : : "r" (ossr0)); \
+	__asm__ volatile ("stcr %0, %%cr18" : : "r" (ossr1)); \
+	__asm__ volatile ("stcr %0, %%cr19" : : "r" (ossr2)); \
+	__asm__ volatile ("stcr %0, %%cr20" : : "r" (ossr3))
 
 /* ==== */
 
@@ -78,9 +78,9 @@ scm_cpuconfig(struct scm_cpuconfig *scc)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (scc));
+	__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (scc));
 	SCM_CALL(SCM_CPUCONFIG);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -99,7 +99,7 @@ scm_cpuid()
 	SCM_CONTEXT();
 	SCM_VBR();
 	SCM_CALL(SCM_CPUID);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -118,7 +118,7 @@ scm_getc(void)
 	SCM_CONTEXT();
 	SCM_VBR();
 	SCM_CALL(SCM_CHAR);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -137,7 +137,7 @@ scm_getenaddr(u_char *ea)
 	SCM_CONTEXT();
 	SCM_VBR();
 	SCM_CALL(SCM_COMMID);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (addr));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (addr));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -173,9 +173,9 @@ scm_memsize(int which)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (which));
+	__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (which));
 	SCM_CALL(SCM_MSIZE);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (msize));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (msize));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -196,7 +196,7 @@ scm_printf(const char *msg)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (msg));
+	__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (msg));
 	SCM_CALL(SCM_PTLINE);
 	OS_CONTEXT();
 	OS_VBR();
@@ -214,7 +214,7 @@ scm_promver()
 	SCM_CONTEXT();
 	SCM_VBR();
 	SCM_CALL(SCM_REVNUM);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -231,7 +231,7 @@ scm_putc(int c)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (c));
+	__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (c));
 	SCM_CALL(SCM_OCHAR);
 	OS_CONTEXT();
 	OS_VBR();
@@ -262,7 +262,7 @@ scm_reboot(const char *cmdline)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (cmdline));
+	__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (cmdline));
 	SCM_CALL(SCM_REBOOT);
 #if 0
 	OS_CONTEXT();
@@ -283,7 +283,7 @@ scm_sysid()
 	SCM_CONTEXT();
 	SCM_VBR();
 	SCM_CALL(SCM_SYSID);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
@@ -302,10 +302,10 @@ scm_jpstart(cpuid_t cpu, vaddr_t addr)
 	set_psr(psr | PSR_IND);
 	SCM_CONTEXT();
 	SCM_VBR();
-	__asm__ __volatile__ ("or %%r2, %%r0, %0; or %%r3, %%r0, %1" : :
+	__asm__ volatile ("or %%r2, %%r0, %0; or %%r3, %%r0, %1" : :
 	    "r" (cpu), "r" (addr));
 	SCM_CALL(SCM_JPSTART);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 	OS_CONTEXT();
 	OS_VBR();
 	set_psr(psr);
diff --git a/sys/arch/aviion/stand/libprom/cpuid.c b/sys/arch/aviion/stand/libprom/cpuid.c
index 4a421c21b21..a459286991e 100644
--- a/sys/arch/aviion/stand/libprom/cpuid.c
+++ b/sys/arch/aviion/stand/libprom/cpuid.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpuid.c,v 1.1 2013/10/16 16:59:35 miod Exp $	*/
+/*	$OpenBSD: cpuid.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -26,7 +26,7 @@ cpuid(void)
 	uint ret;
 
 	SCM_CALL(SCM_CPUID);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 
 	return ret;
 }
diff --git a/sys/arch/aviion/stand/libprom/getc.c b/sys/arch/aviion/stand/libprom/getc.c
index 55ea0c126b2..607288fab51 100644
--- a/sys/arch/aviion/stand/libprom/getc.c
+++ b/sys/arch/aviion/stand/libprom/getc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: getc.c,v 1.2 2013/09/28 21:59:38 miod Exp $	*/
+/*	$OpenBSD: getc.c,v 1.3 2014/03/29 18:09:29 guenther Exp $	*/
 /*
  * Copyright (c) 2006, Miodrag Vallat
  *
@@ -34,7 +34,7 @@ getchar(void)
 	u_int ret;
 
 	SCM_CALL(SCM_CHAR);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (ret));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (ret));
 
 	return (ret & 0xff);
 }
diff --git a/sys/arch/aviion/stand/libprom/getenaddr.c b/sys/arch/aviion/stand/libprom/getenaddr.c
index bae21aa67e1..8f7a426f3c0 100644
--- a/sys/arch/aviion/stand/libprom/getenaddr.c
+++ b/sys/arch/aviion/stand/libprom/getenaddr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: getenaddr.c,v 1.2 2013/09/28 21:59:38 miod Exp $	*/
+/*	$OpenBSD: getenaddr.c,v 1.3 2014/03/29 18:09:29 guenther Exp $	*/
 /*
  * Copyright (c) 2006, Miodrag Vallat
  *
@@ -34,7 +34,7 @@ scm_getenaddr(u_char *ea)
 	u_char *addr;
 
 	SCM_CALL(SCM_COMMID);
-	__asm__ __volatile__ ("or %0, %%r0, %%r2" : "=r" (addr));
+	__asm__ volatile ("or %0, %%r0, %%r2" : "=r" (addr));
 
 	ea[0] = addr[0];
 	ea[1] = addr[1];
diff --git a/sys/arch/aviion/stand/libprom/prom.h b/sys/arch/aviion/stand/libprom/prom.h
index 68c91da6fdf..68a52d0ed0e 100644
--- a/sys/arch/aviion/stand/libprom/prom.h
+++ b/sys/arch/aviion/stand/libprom/prom.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: prom.h,v 1.3 2013/10/16 16:59:35 miod Exp $	*/
+/*	$OpenBSD: prom.h,v 1.4 2014/03/29 18:09:29 guenther Exp $	*/
 /*
  * Copyright (c) 2006, Miodrag Vallat
  *
@@ -40,7 +40,7 @@ void	scm_getenaddr(u_char *);
  */
 
 #define SCM_CALL(x) \
-	__asm__ __volatile__ ("or %%r9,%%r0," __STRING(x) "; tb0 0,%%r0,496" \
+	__asm__ volatile ("or %%r9,%%r0," __STRING(x) "; tb0 0,%%r0,496" \
 	    :::	"r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",		\
 		"r9", "r10", "r11", "r12", "r13")
 
diff --git a/sys/arch/aviion/stand/libprom/putc.c b/sys/arch/aviion/stand/libprom/putc.c
index 6376cfda191..65e14a5c109 100644
--- a/sys/arch/aviion/stand/libprom/putc.c
+++ b/sys/arch/aviion/stand/libprom/putc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: putc.c,v 1.2 2013/09/28 21:59:39 miod Exp $	*/
+/*	$OpenBSD: putc.c,v 1.3 2014/03/29 18:09:29 guenther Exp $	*/
 /*
  * Copyright (c) 2006, Miodrag Vallat
  *
@@ -34,7 +34,7 @@ putchar(int c)
 	if (c == '\n') {
 		SCM_CALL(SCM_OCRLF);
 	} else {
-		__asm__ __volatile__ ("or %%r2, %%r0, %0" : : "r" (c));
+		__asm__ volatile ("or %%r2, %%r0, %0" : : "r" (c));
 		SCM_CALL(SCM_OCHAR);
 	}
 }
diff --git a/sys/arch/aviion/stand/libsa/fault.c b/sys/arch/aviion/stand/libsa/fault.c
index e3d362ca410..bba55c500ee 100644
--- a/sys/arch/aviion/stand/libsa/fault.c
+++ b/sys/arch/aviion/stand/libsa/fault.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fault.c,v 1.1 2013/10/08 21:55:22 miod Exp $	*/
+/*	$OpenBSD: fault.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -47,14 +47,14 @@ static __inline__ uint32_t
 get_vbr()
 {
 	uint32_t vbr;
-	__asm__ __volatile__ ("ldcr %0, %%cr7" : "=r"(vbr));
+	__asm__ volatile ("ldcr %0, %%cr7" : "=r"(vbr));
 	return vbr;
 }
 
 static __inline__ void
 set_vbr(uint32_t vbr)
 {
-	__asm__ __volatile__ ("stcr %0, %%cr7" :: "r"(vbr));
+	__asm__ volatile ("stcr %0, %%cr7" :: "r"(vbr));
 }
 
 /*
diff --git a/sys/arch/hppa/dev/clock.c b/sys/arch/hppa/dev/clock.c
index 07f4abc9480..9c8002f840b 100644
--- a/sys/arch/hppa/dev/clock.c
+++ b/sys/arch/hppa/dev/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.28 2011/01/09 19:37:51 jasper Exp $	*/
+/*	$OpenBSD: clock.c,v 1.29 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2003 Michael Shalayeff
@@ -97,8 +97,8 @@ cpu_hardclock(void *v)
 	 */
 	eta = ci->ci_itmr + cpu_hzticks;
 	wrap = eta < ci->ci_itmr;	/* watch out for a wraparound */
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	mtctl(eta, CR_ITMR);
 	mfctl(CR_ITMR, __itmr);
 	/*
@@ -123,7 +123,7 @@ cpu_hardclock(void *v)
 		eta += cpu_hzticks;
 		mtctl(eta, CR_ITMR);
 	}
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 
 	return (1);
 }
diff --git a/sys/arch/hppa/dev/dino.c b/sys/arch/hppa/dev/dino.c
index 49c5e95c342..1a75abe6c75 100644
--- a/sys/arch/hppa/dev/dino.c
+++ b/sys/arch/hppa/dev/dino.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dino.c,v 1.30 2011/01/01 15:20:19 kettenis Exp $	*/
+/*	$OpenBSD: dino.c,v 1.31 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2003-2005 Michael Shalayeff
@@ -1736,7 +1736,7 @@ dinoattach(parent, self, aux)
 	data = r->irr0;
 	data = r->irr1;
 	r->imr = 0;
-	__asm __volatile ("" ::: "memory");
+	__asm volatile ("" ::: "memory");
 	r->icr = 0;
 	r->iar0 = cpu_gethpa(0) | (31 - ca->ca_irq);
 	splx(s);
diff --git a/sys/arch/hppa/dev/mem.c b/sys/arch/hppa/dev/mem.c
index 809df3300cb..a0085765c3b 100644
--- a/sys/arch/hppa/dev/mem.c
+++ b/sys/arch/hppa/dev/mem.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mem.c,v 1.32 2010/12/26 15:40:59 miod Exp $	*/
+/*	$OpenBSD: mem.c,v 1.33 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -236,7 +236,7 @@ memattach(parent, self, aux)
 
 			sc->sc_vp->vi_control = vic;
 
-			__asm __volatile("stwas %1, 0(%0)"
+			__asm volatile("stwas %1, 0(%0)"
 			    :: "r" (&VI_CTRL), "r" (vic) : "memory");
 			splx(s);
 #ifdef DEBUG
@@ -300,7 +300,7 @@ viper_eisa_en()
 		vic = VI_CTRL;
 		vic &= ~VI_CTRL_EISA_DEN;
 		sc->sc_vp->vi_control = vic;
-		__asm __volatile("stwas %1, 0(%0)"
+		__asm volatile("stwas %1, 0(%0)"
 		    :: "r" (&VI_CTRL), "r" (vic) : "memory");
 		splx(s);
 	}
diff --git a/sys/arch/hppa/dev/power.c b/sys/arch/hppa/dev/power.c
index 132d0f9f16f..80b1b317846 100644
--- a/sys/arch/hppa/dev/power.c
+++ b/sys/arch/hppa/dev/power.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: power.c,v 1.5 2004/06/11 12:53:09 mickey Exp $	*/
+/*	$OpenBSD: power.c,v 1.6 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2003 Michael Shalayeff
@@ -167,7 +167,7 @@ power_thread_reg(void *v)
 	u_int32_t r;
 
 	for (;;) {
-		__asm __volatile("ldwas 0(%1), %0"
+		__asm volatile("ldwas 0(%1), %0"
 		    : "=&r" (r) : "r" (sc->sc_pwr_reg));
 
 		if (!(r & 1))
diff --git a/sys/arch/hppa/gsc/if_ie_gsc.c b/sys/arch/hppa/gsc/if_ie_gsc.c
index 44e3376db9f..cc5ffdaa15d 100644
--- a/sys/arch/hppa/gsc/if_ie_gsc.c
+++ b/sys/arch/hppa/gsc/if_ie_gsc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_ie_gsc.c,v 1.25 2004/10/28 19:13:30 mickey Exp $	*/
+/*	$OpenBSD: if_ie_gsc.c,v 1.26 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -224,7 +224,7 @@ ie_gsc_read16(sc, offset)
 {
 	volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);
 
-	asm __volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr));
+	asm volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr));
 	return *addr;
 }
 
@@ -237,7 +237,7 @@ ie_gsc_write16(sc, offset, v)
 	volatile u_int16_t *addr = (volatile u_int16_t *)(sc->bh + offset);
 
 	*addr = v;
-	asm __volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr));
+	asm volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr));
 }
 
 void
@@ -250,8 +250,8 @@ ie_gsc_write24(sc, offset, v)
 
 	addr[0] = (v      ) & 0xffff;
 	addr[1] = (v >> 16) & 0xffff;
-	asm __volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr+0));
-	asm __volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr+1));
+	asm volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr+0));
+	asm volatile ("fdc	%%r0(%%sr0, %0)" :: "r" (addr+1));
 }
 
 void
diff --git a/sys/arch/hppa/hppa/db_interface.c b/sys/arch/hppa/hppa/db_interface.c
index 69a395a4c31..1b2c793c943 100644
--- a/sys/arch/hppa/hppa/db_interface.c
+++ b/sys/arch/hppa/hppa/db_interface.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_interface.c,v 1.33 2013/07/07 14:08:05 deraadt Exp $	*/
+/*	$OpenBSD: db_interface.c,v 1.34 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1999-2003 Michael Shalayeff
@@ -129,7 +129,7 @@ Debugger()
 {
 	extern int kernelmapped;	/* from locore.S */
 	if (kernelmapped)
-		__asm __volatile ("break %0, %1"
+		__asm volatile ("break %0, %1"
 		    :: "i" (HPPA_BREAK_KERNEL), "i" (HPPA_BREAK_KGDB));
 }
 
diff --git a/sys/arch/hppa/hppa/lock_machdep.c b/sys/arch/hppa/hppa/lock_machdep.c
index c12e220ffb6..cbc29bc553b 100644
--- a/sys/arch/hppa/hppa/lock_machdep.c
+++ b/sys/arch/hppa/hppa/lock_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock_machdep.c,v 1.4 2013/12/05 01:28:45 uebayasi Exp $	*/
+/*	$OpenBSD: lock_machdep.c,v 1.5 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -115,7 +115,7 @@ __mp_lock(struct __mp_lock *mpl)
 	while (1) {
 		s = hppa_intr_disable();
 		if (__cpu_cas(mpl, &mpl->mpl_count, 0, 1) == 0) {
-			__asm __volatile("sync" ::: "memory");
+			__asm volatile("sync" ::: "memory");
 			mpl->mpl_cpu = curcpu();
 		}
 		if (mpl->mpl_cpu == curcpu()) {
@@ -145,7 +145,7 @@ __mp_unlock(struct __mp_lock *mpl)
 	s = hppa_intr_disable();
 	if (--mpl->mpl_count == 1) {
 		mpl->mpl_cpu = NULL;
-		__asm __volatile("sync" ::: "memory");
+		__asm volatile("sync" ::: "memory");
 		mpl->mpl_count = 0;
 	}
 	hppa_intr_enable(s);
@@ -167,7 +167,7 @@ __mp_release_all(struct __mp_lock *mpl)
 
 	s = hppa_intr_disable();
 	mpl->mpl_cpu = NULL;
-	__asm __volatile("sync" ::: "memory");
+	__asm volatile("sync" ::: "memory");
 	mpl->mpl_count = 0;
 	hppa_intr_enable(s);
 
diff --git a/sys/arch/hppa/hppa/machdep.c b/sys/arch/hppa/hppa/machdep.c
index ae373be5f2d..85fd71a05c2 100644
--- a/sys/arch/hppa/hppa/machdep.c
+++ b/sys/arch/hppa/hppa/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.216 2014/03/26 05:23:42 guenther Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.217 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1999-2003 Michael Shalayeff
@@ -946,7 +946,7 @@ haltsys:
 
 		printf("System halted!\n");
 		DELAY(2000000);
-		__asm __volatile("stwas %0, 0(%1)"
+		__asm volatile("stwas %0, 0(%1)"
 		    :: "r" (CMD_STOP), "r" (HPPA_LBCAST + iomod_command));
 	} else {
 		printf("rebooting...");
@@ -956,9 +956,9 @@ haltsys:
                 pdc_call((iodcio_t)pdc, 0, PDC_BROADCAST_RESET, PDC_DO_RESET);
 
 		/* forcably reset module if that fails */
-		__asm __volatile(".export hppa_reset, entry\n\t"
+		__asm volatile(".export hppa_reset, entry\n\t"
 		    ".label hppa_reset");
-		__asm __volatile("stwas %0, 0(%1)"
+		__asm volatile("stwas %0, 0(%1)"
 		    :: "r" (CMD_RESET), "r" (HPPA_LBCAST + iomod_command));
 	}
 
diff --git a/sys/arch/hppa/hppa/mainbus.c b/sys/arch/hppa/hppa/mainbus.c
index 9daf347bbe3..06a68945261 100644
--- a/sys/arch/hppa/hppa/mainbus.c
+++ b/sys/arch/hppa/hppa/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.81 2010/06/19 14:06:54 miod Exp $	*/
+/*	$OpenBSD: mainbus.c,v 1.82 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -1024,7 +1024,7 @@ mbus_dmamap_sync(void *v, bus_dmamap_t map, bus_addr_t off, bus_size_t len,
 		}
 
 	/* for either operation sync the shit away */
-	__asm __volatile ("sync\n\tsyncdma\n\tsync\n\t"
+	__asm volatile ("sync\n\tsyncdma\n\tsync\n\t"
 	    "nop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop");
 }
 
diff --git a/sys/arch/hppa/include/atomic.h b/sys/arch/hppa/include/atomic.h
index b9e676805e0..9cfe677db9c 100644
--- a/sys/arch/hppa/include/atomic.h
+++ b/sys/arch/hppa/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.5 2011/03/23 16:54:35 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.6 2014/03/29 18:09:29 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -19,55 +19,55 @@ extern struct mutex mtx_atomic;
 #endif
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip |= v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip &= ~v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_setbits_long(__volatile unsigned long *uip, unsigned long v)
+atomic_setbits_long(volatile unsigned long *uip, unsigned long v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip |= v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_clearbits_long(__volatile unsigned long *uip, unsigned long v)
+atomic_clearbits_long(volatile unsigned long *uip, unsigned long v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip &= ~v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 #endif /* defined(_KERNEL) */
diff --git a/sys/arch/hppa/include/cpufunc.h b/sys/arch/hppa/include/cpufunc.h
index 9c7efe2281e..3e46b028c26 100644
--- a/sys/arch/hppa/include/cpufunc.h
+++ b/sys/arch/hppa/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.28 2013/03/25 19:59:22 deraadt Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.29 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -68,37 +68,37 @@
 /* Get space register for an address */
 static __inline register_t ldsid(vaddr_t p) {
 	register_t ret;
-	__asm __volatile("ldsid (%1),%0" : "=r" (ret) : "r" (p));
+	__asm volatile("ldsid (%1),%0" : "=r" (ret) : "r" (p));
 	return ret;
 }
 
-#define mtctl(v,r) __asm __volatile("mtctl %0,%1":: "r" (v), "i" (r))
-#define mfctl(r,v) __asm __volatile("mfctl %1,%0": "=r" (v): "i" (r))
+#define mtctl(v,r) __asm volatile("mtctl %0,%1":: "r" (v), "i" (r))
+#define mfctl(r,v) __asm volatile("mfctl %1,%0": "=r" (v): "i" (r))
 
 #define	mfcpu(r,v)	/* XXX for the lack of the mnemonics */		\
-	__asm __volatile(".word	%1\n\t"					\
+	__asm volatile(".word	%1\n\t"					\
 			 "copy	%%r22, %0"				\
 	    : "=r" (v) : "i" ((0x14001400 | ((r) << 21) | (22)))	\
 	    : "r22")
 
-#define mtsp(v,r) __asm __volatile("mtsp %0,%1":: "r" (v), "i" (r))
-#define mfsp(r,v) __asm __volatile("mfsp %1,%0": "=r" (v): "i" (r))
+#define mtsp(v,r) __asm volatile("mtsp %0,%1":: "r" (v), "i" (r))
+#define mfsp(r,v) __asm volatile("mfsp %1,%0": "=r" (v): "i" (r))
 
-#define ssm(v,r) __asm __volatile("ssm %1,%0": "=r" (r): "i" (v))
-#define rsm(v,r) __asm __volatile("rsm %1,%0": "=r" (r): "i" (v))
+#define ssm(v,r) __asm volatile("ssm %1,%0": "=r" (r): "i" (v))
+#define rsm(v,r) __asm volatile("rsm %1,%0": "=r" (r): "i" (v))
 
 /* Move to system mask. Old value of system mask is returned. */
 static __inline register_t
 mtsm(register_t mask) {
 	register_t ret;
-	__asm __volatile("ssm 0,%0\n\t"
+	__asm volatile("ssm 0,%0\n\t"
 			 "mtsm %1": "=&r" (ret) : "r" (mask));
 	return ret;
 }
 
-#define	fdce(sp,off) __asm __volatile("fdce 0(%0,%1)":: "i" (sp), "r" (off))
-#define	fice(sp,off) __asm __volatile("fice 0(%0,%1)":: "i" (sp), "r" (off))
-#define sync_caches() __asm __volatile(\
+#define	fdce(sp,off) __asm volatile("fdce 0(%0,%1)":: "i" (sp), "r" (off))
+#define	fice(sp,off) __asm volatile("fice 0(%0,%1)":: "i" (sp), "r" (off))
+#define sync_caches() __asm volatile(\
     "sync\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop":::"memory")
 
 static __inline void
diff --git a/sys/arch/hppa/include/intr.h b/sys/arch/hppa/include/intr.h
index caf1c1181b2..864509b2f27 100644
--- a/sys/arch/hppa/include/intr.h
+++ b/sys/arch/hppa/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.38 2013/05/17 19:38:51 kettenis Exp $	*/
+/*	$OpenBSD: intr.h,v 1.39 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2002-2004 Michael Shalayeff
@@ -91,7 +91,7 @@ static __inline int
 spllower(int ncpl)
 {
 	register int ocpl asm("r28") = ncpl;
-	__asm __volatile("copy  %0, %%arg0\n\tbreak %1, %2"
+	__asm volatile("copy  %0, %%arg0\n\tbreak %1, %2"
 	    : "+r" (ocpl) : "i" (HPPA_BREAK_KERNEL), "i" (HPPA_BREAK_SPLLOWER)
 	    : "r26", "memory");
 	return (ocpl);
@@ -105,7 +105,7 @@ splraise(int ncpl)
 
 	if (ocpl < ncpl)
 		ci->ci_cpl = ncpl;
-	__asm __volatile ("sync" : "+r" (ci->ci_cpl));
+	__asm volatile ("sync" : "+r" (ci->ci_cpl));
 
 	return (ocpl);
 }
@@ -121,8 +121,8 @@ hppa_intr_disable(void)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl %%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl %r0, %cr15");
+	__asm volatile("mfctl %%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl %r0, %cr15");
 
 	return eiem;
 }
@@ -130,7 +130,7 @@ hppa_intr_disable(void)
 static __inline void
 hppa_intr_enable(register_t eiem)
 {
-	__asm __volatile("mtctl %0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl %0, %%cr15":: "r" (eiem));
 }
 
 #define	splsoftclock()	splraise(IPL_SOFTCLOCK)
diff --git a/sys/arch/hppa/include/lock.h b/sys/arch/hppa/include/lock.h
index ab494703aca..001a8e79767 100644
--- a/sys/arch/hppa/include/lock.h
+++ b/sys/arch/hppa/include/lock.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock.h,v 1.6 2011/06/24 12:49:06 jsing Exp $	*/
+/*	$OpenBSD: lock.h,v 1.7 2014/03/29 18:09:29 guenther Exp $	*/
 
 /* public domain */
 
@@ -24,7 +24,7 @@ __cpu_simple_lock(__cpu_simple_lock_t *l)
 	volatile u_int old;
 
 	do {
-		__asm__ __volatile__
+		__asm__ volatile
 		    ("ldcws 0(%2), %0" : "=&r" (old), "+m" (l) : "r" (l));
 	} while (old != __SIMPLELOCK_UNLOCKED);
 }
@@ -34,7 +34,7 @@ __cpu_simple_lock_try(__cpu_simple_lock_t *l)
 {
 	volatile u_int old;
 
-	__asm__ __volatile__
+	__asm__ volatile
 	    ("ldcws 0(%2), %0" : "=&r" (old), "+m" (l) : "r" (l));
 
 	return (old == __SIMPLELOCK_UNLOCKED);
diff --git a/sys/arch/hppa64/dev/cpu.c b/sys/arch/hppa64/dev/cpu.c
index ae04948263a..92631482fb7 100644
--- a/sys/arch/hppa64/dev/cpu.c
+++ b/sys/arch/hppa64/dev/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.5 2011/04/07 13:13:01 jsing Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.6 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Michael Shalayeff
@@ -92,8 +92,8 @@ cpu_hardclock(void *v)
 	 */
 	eta = ci->ci_itmr + cpu_hzticks;
 	wrap = eta < ci->ci_itmr;	/* watch out for a wraparound */
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	mtctl(eta, CR_ITMR);
 	__itmr = mfctl(CR_ITMR);
 
@@ -119,7 +119,7 @@ cpu_hardclock(void *v)
 		eta += cpu_hzticks;
 		mtctl(eta, CR_ITMR);
 	}
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 
 	return (1);
 }
diff --git a/sys/arch/hppa64/dev/power.c b/sys/arch/hppa64/dev/power.c
index ce3befc9523..0f06d7e7c5e 100644
--- a/sys/arch/hppa64/dev/power.c
+++ b/sys/arch/hppa64/dev/power.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: power.c,v 1.1 2005/04/01 10:40:47 mickey Exp $	*/
+/*	$OpenBSD: power.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Michael Shalayeff
@@ -119,7 +119,7 @@ power_thread_reg(void *v)
 	u_int32_t r;
 
 	for (;;) {
-		__asm __volatile("ldwas 0(%1), %0"
+		__asm volatile("ldwas 0(%1), %0"
 		    : "=&r" (r) : "r" (sc->sc_pwr_reg));
 
 		if (!(r & 1))
diff --git a/sys/arch/hppa64/hppa64/db_interface.c b/sys/arch/hppa64/hppa64/db_interface.c
index 022f7aaf04a..4dd1f4e7485 100644
--- a/sys/arch/hppa64/hppa64/db_interface.c
+++ b/sys/arch/hppa64/hppa64/db_interface.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_interface.c,v 1.2 2011/09/22 21:51:24 jsing Exp $	*/
+/*	$OpenBSD: db_interface.c,v 1.3 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Michael Shalayeff
@@ -113,7 +113,7 @@ int db_active = 0;
 void
 Debugger(void)
 {
-	__asm __volatile ("break %0, %1"
+	__asm volatile ("break %0, %1"
 	    :: "i" (HPPA_BREAK_KERNEL), "i" (HPPA_BREAK_KGDB));
 }
 
diff --git a/sys/arch/hppa64/hppa64/machdep.c b/sys/arch/hppa64/hppa64/machdep.c
index b9b5427fcc0..2e2f19f0c00 100644
--- a/sys/arch/hppa64/hppa64/machdep.c
+++ b/sys/arch/hppa64/hppa64/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.56 2014/03/26 05:23:42 guenther Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.57 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Michael Shalayeff
@@ -475,10 +475,10 @@ fall(int c_base, int c_count, int c_loop, int c_stride, int data)
 	for (; c_count--; c_base += c_stride)
 		for (loop = c_loop; loop--; )
 			if (data)
-				__asm __volatile("fdce 0(%%sr0,%0)"
+				__asm volatile("fdce 0(%%sr0,%0)"
 				    :: "r" (c_base));
 			else
-				__asm __volatile("fice 0(%%sr0,%0)"
+				__asm volatile("fice 0(%%sr0,%0)"
 				    :: "r" (c_base));
 }
 
@@ -592,7 +592,7 @@ haltsys:
 
 		printf("System halted!\n");
 		DELAY(2000000);
-		__asm __volatile("stwas %0, 0(%1)"
+		__asm volatile("stwas %0, 0(%1)"
 		    :: "r" (CMD_STOP), "r" (HPPA_LBCAST + iomod_command));
 	} else {
 		printf("rebooting...");
@@ -602,9 +602,9 @@ haltsys:
                 pdc_call((iodcio_t)pdc, 0, PDC_BROADCAST_RESET, PDC_DO_RESET);
 
 		/* forcably reset module if that fails */
-		__asm __volatile(".export hppa_reset, entry\n\t"
+		__asm volatile(".export hppa_reset, entry\n\t"
 		    ".label hppa_reset");
-		__asm __volatile("stwas %0, 0(%1)"
+		__asm volatile("stwas %0, 0(%1)"
 		    :: "r" (CMD_RESET), "r" (HPPA_LBCAST + iomod_command));
 	}
 
diff --git a/sys/arch/hppa64/include/atomic.h b/sys/arch/hppa64/include/atomic.h
index 9a02d9e0d05..9cfe677db9c 100644
--- a/sys/arch/hppa64/include/atomic.h
+++ b/sys/arch/hppa64/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.5 2011/11/14 14:29:57 deraadt Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.6 2014/03/29 18:09:29 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -19,55 +19,55 @@ extern struct mutex mtx_atomic;
 #endif
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip |= v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip &= ~v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_setbits_long(__volatile unsigned long *uip, unsigned long v)
+atomic_setbits_long(volatile unsigned long *uip, unsigned long v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip |= v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 static __inline void
-atomic_clearbits_long(__volatile unsigned long *uip, unsigned long v)
+atomic_clearbits_long(volatile unsigned long *uip, unsigned long v)
 {
 	register_t eiem;
 
-	__asm __volatile("mfctl	%%cr15, %0": "=r" (eiem));
-	__asm __volatile("mtctl	%r0, %cr15");
+	__asm volatile("mfctl	%%cr15, %0": "=r" (eiem));
+	__asm volatile("mtctl	%r0, %cr15");
 	ATOMIC_LOCK;
 	*uip &= ~v;
 	ATOMIC_UNLOCK;
-	__asm __volatile("mtctl	%0, %%cr15":: "r" (eiem));
+	__asm volatile("mtctl	%0, %%cr15":: "r" (eiem));
 }
 
 #endif /* defined(_KERNEL) */
diff --git a/sys/arch/hppa64/include/cpufunc.h b/sys/arch/hppa64/include/cpufunc.h
index ea08254ebdf..847c218088c 100644
--- a/sys/arch/hppa64/include/cpufunc.h
+++ b/sys/arch/hppa64/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.3 2011/04/05 17:17:06 jsing Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.4 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -29,9 +29,9 @@
 #ifndef _MACHINE_CPUFUNC_H_
 #define _MACHINE_CPUFUNC_H_
 
-#define	mtsp(v,r)	__asm __volatile ("mtsp %0,%1":: "r" (v), "i" (r))
+#define	mtsp(v,r)	__asm volatile ("mtsp %0,%1":: "r" (v), "i" (r))
 
-#define	ssm(v,r)	__asm __volatile("ssm %1,%0": "=r" (r): "i" (v))
-#define	rsm(v,r)	__asm __volatile("rsm %1,%0": "=r" (r): "i" (v))
+#define	ssm(v,r)	__asm volatile("ssm %1,%0": "=r" (r): "i" (v))
+#define	rsm(v,r)	__asm volatile("rsm %1,%0": "=r" (r): "i" (v))
 
 #endif
diff --git a/sys/arch/i386/i386/apm.c b/sys/arch/i386/i386/apm.c
index 15ced565928..1a350ec57bb 100644
--- a/sys/arch/i386/i386/apm.c
+++ b/sys/arch/i386/i386/apm.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: apm.c,v 1.103 2014/03/13 03:52:55 dlg Exp $	*/
+/*	$OpenBSD: apm.c,v 1.104 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*-
  * Copyright (c) 1998-2001 Michael Shalayeff. All rights reserved.
@@ -611,11 +611,11 @@ apm_cpu_idle(void)
 
 		/* If BIOS did not halt, halt now! */
 		if (apm_flags & APM_IDLE_SLOWS) {
-			__asm __volatile("sti;hlt");
+			__asm volatile("sti;hlt");
 		}
 		call_apm_idle = curcpu()->ci_schedstate.spc_cp_time[CP_IDLE];
 	} else {
-		__asm __volatile("sti;hlt");
+		__asm volatile("sti;hlt");
 	}
 }
 
diff --git a/sys/arch/i386/i386/bios.c b/sys/arch/i386/i386/bios.c
index 3a5eb859fc1..b4320c6128a 100644
--- a/sys/arch/i386/i386/bios.c
+++ b/sys/arch/i386/i386/bios.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bios.c,v 1.103 2013/11/02 15:02:27 kettenis Exp $	*/
+/*	$OpenBSD: bios.c,v 1.104 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-2001 Michael Shalayeff
@@ -644,7 +644,7 @@ bios32_service(u_int32_t service, bios32_entry_t e, bios32_entry_info_t ei)
 		return 0;
 
 	base = 0;
-	__asm __volatile("lcall *(%4)"
+	__asm volatile("lcall *(%4)"
 	    : "+a" (service), "+b" (base), "=c" (count), "=d" (off)
 	    : "D" (&bios32_entry)
 	    : "%esi", "cc", "memory");
diff --git a/sys/arch/i386/i386/bus_dma.c b/sys/arch/i386/i386/bus_dma.c
index 710ba3b211c..f822ed4d2a9 100644
--- a/sys/arch/i386/i386/bus_dma.c
+++ b/sys/arch/i386/i386/bus_dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_dma.c,v 1.28 2014/03/12 13:00:35 kettenis Exp $	*/
+/*	$OpenBSD: bus_dma.c,v 1.29 2014/03/29 18:09:29 guenther Exp $	*/
 /*-
  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -373,7 +373,7 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
     bus_size_t size, int op)
 {
 	/* Nothing to do here. */
-	__asm __volatile("" : : : "memory");
+	__asm volatile("" : : : "memory");
 }
 
 /*
diff --git a/sys/arch/i386/i386/bus_space.c b/sys/arch/i386/i386/bus_space.c
index abd434d1a4c..83454b80c95 100644
--- a/sys/arch/i386/i386/bus_space.c
+++ b/sys/arch/i386/i386/bus_space.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_space.c,v 1.4 2009/07/16 21:07:41 mk Exp $ */
+/*	$OpenBSD: bus_space.c,v 1.5 2014/03/29 18:09:29 guenther Exp $ */
 /*-
  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -102,7 +102,7 @@ bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
 	} else {
 		void *_addr=a;
 		int _cnt=cnt;
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movb (%2),%%al				;"
 		"	stosb					;"
 		"	loop 1b"				:
@@ -120,7 +120,7 @@ bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
 	} else {
 		void *_addr=a;
 		int _cnt=cnt;
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movw (%2),%%ax				;"
 		"	stosw					;"
 		"	loop 1b"				:
@@ -137,7 +137,7 @@ bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
 	} else {
 		void *_addr=a;
 		int _cnt=cnt;
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movl (%2),%%eax				;"
 		"	stosl					;"
 		"	loop 1b"				:
@@ -155,7 +155,7 @@ bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h,
 	int _port = h + o;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	inb %w2,%%al				;"
 		"	stosb					;"
 		"	incl %2					;"
@@ -175,7 +175,7 @@ bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h,
 	int _port = h + o;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	inw %w2,%%ax				;"
 		"	stosw					;"
 		"	addl $2,%2				;"
@@ -195,7 +195,7 @@ bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h,
 	int _port = h + o;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	inl %w2,%%eax				;"
 		"	stosl					;"
 		"	addl $4,%2				;"
@@ -246,7 +246,7 @@ bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h,
 		const void *_addr=a;
 		int _cnt=cnt;
 
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsb					;"
 		"	movb %%al,(%2)				;"
 		"	loop 1b"				:
@@ -265,7 +265,7 @@ bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h,
 		const void *_addr = a;
 		int _cnt = cnt;
 
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsw					;"
 		"	movw %%ax,(%2)				;"
 		"	loop 1b"				:
@@ -283,7 +283,7 @@ bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h,
 		const void *_addr=a;
 		int _cnt=cnt;
 
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsl					;"
 		"	movl %%eax,(%2)				;"
 		"	loop 1b"				:
@@ -301,7 +301,7 @@ bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsb					;"
 		"	outb %%al,%w0				;"
 		"	incl %0					;"
@@ -321,7 +321,7 @@ bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsw					;"
 		"	outw %%ax,%w0				;"
 		"	addl $2,%0				;"
@@ -341,7 +341,7 @@ bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	lodsl					;"
 		"	outl %%eax,%w0				;"
 		"	addl $4,%0				;"
@@ -359,13 +359,13 @@ bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	outb %b2, %w1				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "d" (h + o), "a" (v)		:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movb %b2, (%1)				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "D" (h + o), "a" (v)		:
@@ -380,13 +380,13 @@ bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	outw %w2, %w1				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "d" (h + o), "a" (v)	:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movw %w2, (%1)				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "D" (h + o), "a" (v)		:
@@ -401,13 +401,13 @@ bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	outl %2,%w1				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "d" (h + o), "a" (v)	:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"1:	movl %2,(%1)				;"
 		"	loop 1b"				:
 		    "+c" (_cnt) : "D" (h + o), "a" (v)	:
@@ -423,14 +423,14 @@ bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	outb %%al,%w0				;"
 		"	incl %0					;"
 		"	loop 1b"				:
 		    "+d" (_port), "+c" (_cnt) : "a" (v)	:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"	repne					;"
 		"	stosb"					:
 		    "+D" (_port), "+c" (_cnt) : "a" (v)	:
@@ -446,14 +446,14 @@ bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	outw %%ax,%w0				;"
 		"	addl $2, %0				;"
 		"	loop 1b"				:
 		    "+d" (_port), "+c" (_cnt) : "a" (v)		:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"	repne					;"
 		"	stosw"					:
 		    "+D" (_port), "+c" (_cnt) : "a" (v)	:
@@ -469,14 +469,14 @@ bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	outl %%eax,%w0				;"
 		"	addl $4, %0				;"
 		"	loop 1b"				:
 		    "+d" (_port), "+c" (_cnt) : "a" (v)		:
 		    "cc");
 	} else {
-		__asm __volatile("cld				;"
+		__asm volatile("cld				;"
 		"	repne					;"
 		"	stosl"					:
 		    "+D" (_port), "+c" (_cnt) : "a" (v)	:
@@ -493,7 +493,7 @@ bus_space_copy_1(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	movl %k1,%%edx				;"
 		"	inb  %%dx,%%al				;"
 		"	movl %k0,%%edx				;"
@@ -515,7 +515,7 @@ bus_space_copy_2(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
 	int _port2 = h2 + o2;
 	int _cnt=cnt;
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	movl %k1,%%edx				;"
 		"	inw  %%dx,%%ax				;"
 		"	movl %k0,%%edx				;"
@@ -538,7 +538,7 @@ bus_space_copy_4(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
 	int _cnt = cnt;
 
 	if (t == I386_BUS_SPACE_IO) {
-		__asm __volatile(
+		__asm volatile(
 		"1:	movl %k1,%%edx				;"
 		"	inl  %%dx,%%eax				;"
 		"	movl %k0,%%edx				;"
diff --git a/sys/arch/i386/i386/cpu.c b/sys/arch/i386/i386/cpu.c
index 57e0b479765..ec0ea71aeb3 100644
--- a/sys/arch/i386/i386/cpu.c
+++ b/sys/arch/i386/i386/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.54 2014/01/19 12:45:35 deraadt Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.55 2014/03/29 18:09:29 guenther Exp $	*/
 /* $NetBSD: cpu.c,v 1.1.2.7 2000/06/26 02:04:05 sommerfeld Exp $ */
 
 /*-
@@ -488,7 +488,7 @@ rdrand(void *v)
 	int i;
 
 	for (i = 0; i < 4; i++) {
-		__asm __volatile(
+		__asm volatile(
 		    "xor        %1, %1\n\t"
 		    "rdrand     %0\n\t"
 		    "rcl        $1, %1\n"
diff --git a/sys/arch/i386/i386/db_interface.c b/sys/arch/i386/i386/db_interface.c
index 096880cc4a6..e6db8b7ed30 100644
--- a/sys/arch/i386/i386/db_interface.c
+++ b/sys/arch/i386/i386/db_interface.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_interface.c,v 1.29 2013/07/04 19:06:48 sf Exp $	*/
+/*	$OpenBSD: db_interface.c,v 1.30 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: db_interface.c,v 1.22 1996/05/03 19:42:00 christos Exp $	*/
 
 /*
@@ -196,28 +196,28 @@ db_sysregs_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif)
 	uint32_t cr;
 	uint16_t ldtr, tr;
 
-	__asm__ __volatile__("sidt %0" : "=m" (idtr));
+	__asm__ volatile("sidt %0" : "=m" (idtr));
 	db_printf("idtr:   0x%08llx/%04llx\n", idtr >> 16, idtr & 0xffff);
 
-	__asm__ __volatile__("sgdt %0" : "=m" (gdtr));
+	__asm__ volatile("sgdt %0" : "=m" (gdtr));
 	db_printf("gdtr:   0x%08llx/%04llx\n", gdtr >> 16, gdtr & 0xffff);
 
-	__asm__ __volatile__("sldt %0" : "=g" (ldtr));
+	__asm__ volatile("sldt %0" : "=g" (ldtr));
 	db_printf("ldtr:   0x%04x\n", ldtr);
 
-	__asm__ __volatile__("str %0" : "=g" (tr));
+	__asm__ volatile("str %0" : "=g" (tr));
 	db_printf("tr:     0x%04x\n", tr);
 
-	__asm__ __volatile__("movl %%cr0,%0" : "=r" (cr));
+	__asm__ volatile("movl %%cr0,%0" : "=r" (cr));
 	db_printf("cr0:    0x%08x\n", cr);
 
-	__asm__ __volatile__("movl %%cr2,%0" : "=r" (cr));
+	__asm__ volatile("movl %%cr2,%0" : "=r" (cr));
 	db_printf("cr2:    0x%08x\n", cr);
 
-	__asm__ __volatile__("movl %%cr3,%0" : "=r" (cr));
+	__asm__ volatile("movl %%cr3,%0" : "=r" (cr));
 	db_printf("cr3:    0x%08x\n", cr);
 
-	__asm__ __volatile__("movl %%cr4,%0" : "=r" (cr));
+	__asm__ volatile("movl %%cr4,%0" : "=r" (cr));
 	db_printf("cr4:    0x%08x\n", cr);
 }
 
diff --git a/sys/arch/i386/i386/kgdb_machdep.c b/sys/arch/i386/i386/kgdb_machdep.c
index 70db4a82ee3..23841d35dd6 100644
--- a/sys/arch/i386/i386/kgdb_machdep.c
+++ b/sys/arch/i386/i386/kgdb_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: kgdb_machdep.c,v 1.9 2008/06/26 05:42:10 ray Exp $	*/
+/*	$OpenBSD: kgdb_machdep.c,v 1.10 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: kgdb_machdep.c,v 1.6 1998/08/13 21:36:03 thorpej Exp $	*/
 
 /*-
@@ -178,7 +178,7 @@ kgdb_getregs(db_regs_t *regs, kgdb_reg_t *gdb_regs)
 		 */
 		gdb_regs[ 4] = (kgdb_reg_t)&regs->tf_esp; /* kernel stack
 							     pointer */
-		__asm __volatile("movw %%ss,%w0" : "=r" (gdb_regs[11]));
+		__asm volatile("movw %%ss,%w0" : "=r" (gdb_regs[11]));
 	}
 }
 
diff --git a/sys/arch/i386/i386/lapic.c b/sys/arch/i386/i386/lapic.c
index 5a6dc442b67..81a94c7dff6 100644
--- a/sys/arch/i386/i386/lapic.c
+++ b/sys/arch/i386/i386/lapic.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lapic.c,v 1.34 2014/01/24 21:20:23 kettenis Exp $	*/
+/*	$OpenBSD: lapic.c,v 1.35 2014/03/29 18:09:29 guenther Exp $	*/
 /* $NetBSD: lapic.c,v 1.1.2.8 2000/02/23 06:10:50 sommerfeld Exp $ */
 
 /*-
@@ -433,7 +433,7 @@ i82489_icr_wait(void)
 #endif /* DIAGNOSTIC */
 
 	while ((i82489_readreg(LAPIC_ICRLO) & LAPIC_DLSTAT_BUSY) != 0) {
-		__asm __volatile("pause": : :"memory");
+		__asm volatile("pause": : :"memory");
 #ifdef DIAGNOSTIC
 		j--;
 		if (j == 0)
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index fca0ad8b2b0..defb7f34074 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.535 2014/03/26 05:23:42 guenther Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.536 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -364,7 +364,7 @@ cyrix_write_reg(u_char reg, u_char data)
 void
 cpuid(u_int32_t ax, u_int32_t *regs)
 {
-	__asm __volatile(
+	__asm volatile(
 	    "cpuid\n\t"
 	    "movl	%%eax, 0(%2)\n\t"
 	    "movl	%%ebx, 4(%2)\n\t"
@@ -3436,7 +3436,7 @@ cpu_reset()
 	bzero((caddr_t)idt, sizeof(idt_region));
 	setregion(&region, idt, sizeof(idt_region) - 1);
 	lidt(&region);
-	__asm __volatile("divl %0,%1" : : "q" (0), "a" (0));
+	__asm volatile("divl %0,%1" : : "q" (0), "a" (0));
 
 #if 1
 	/*
@@ -3929,7 +3929,7 @@ softintr(int sir)
 {
 	struct cpu_info *ci = curcpu();
 
-	__asm __volatile("orl %1, %0" :
+	__asm volatile("orl %1, %0" :
 	    "=m" (ci->ci_ipending) : "ir" (1 << sir));
 }
 
diff --git a/sys/arch/i386/i386/pctr.c b/sys/arch/i386/i386/pctr.c
index 10d3b7a4b5a..0d0dbee7ce0 100644
--- a/sys/arch/i386/i386/pctr.c
+++ b/sys/arch/i386/i386/pctr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pctr.c,v 1.26 2008/11/21 03:22:29 mikeb Exp $	*/
+/*	$OpenBSD: pctr.c,v 1.27 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Pentium performance counter driver for OpenBSD.
@@ -47,11 +47,11 @@ p5ctrrd(struct pctrst *st)
 	msr11 = rdmsr(P5MSR_CTRSEL);
 	st->pctr_fn[0] = msr11 & 0xffff;
 	st->pctr_fn[1] = msr11 >> 16;
-	__asm __volatile("cli");
+	__asm volatile("cli");
 	st->pctr_tsc = rdtsc();
 	st->pctr_hwc[0] = rdmsr(P5MSR_CTR0);
 	st->pctr_hwc[1] = rdmsr(P5MSR_CTR1);
-	__asm __volatile("sti");
+	__asm volatile("sti");
 }
 
 static void
@@ -63,11 +63,11 @@ pctrrd(struct pctrst *st)
 	reg = pctr_isamd ? MSR_K7_EVNTSEL0 : P6MSR_CTRSEL0;
 	for (i = 0; i < num; i++)
 			st->pctr_fn[i] = rdmsr(reg + i);
-	__asm __volatile("cli");
+	__asm volatile("cli");
 	st->pctr_tsc = rdtsc();
 	for (i = 0; i < num; i++)
 		st->pctr_hwc[i] = rdpmc(i);
-	__asm __volatile("sti");
+	__asm volatile("sti");
 }
 
 void
@@ -83,14 +83,14 @@ pctrattach(int num)
 
 	if (usepctr) {
 		/* Enable RDTSC and RDPMC instructions from user-level. */
-		__asm __volatile ("movl %%cr4,%%eax\n"
+		__asm volatile ("movl %%cr4,%%eax\n"
 				  "\tandl %0,%%eax\n"
 				  "\torl %1,%%eax\n"
 				  "\tmovl %%eax,%%cr4"
 				  :: "i" (~CR4_TSD), "i" (CR4_PCE) : "eax");
 	} else if (usetsc) {
 		/* Enable RDTSC instruction from user-level. */
-		__asm __volatile ("movl %%cr4,%%eax\n"
+		__asm volatile ("movl %%cr4,%%eax\n"
 				  "\tandl %0,%%eax\n"
 				  "\tmovl %%eax,%%cr4"
 				  :: "i" (~CR4_TSD) : "eax");
diff --git a/sys/arch/i386/i386/via.c b/sys/arch/i386/i386/via.c
index 97f90b54b07..86e9bce1019 100644
--- a/sys/arch/i386/i386/via.c
+++ b/sys/arch/i386/i386/via.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: via.c,v 1.30 2013/05/30 15:37:51 matthew Exp $	*/
+/*	$OpenBSD: via.c,v 1.31 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -327,8 +327,8 @@ viac3_cbc(void *cw, void *src, void *dst, void *key, int rep,
 	lcr0(creg0 & ~(CR0_EM|CR0_TS));
 
 	/* Do the deed */
-	__asm __volatile("pushfl; popfl");
-	__asm __volatile("rep xcryptcbc" :
+	__asm volatile("pushfl; popfl");
+	__asm volatile("rep xcryptcbc" :
 	    : "a" (iv), "b" (key), "c" (rep), "d" (cw), "S" (src), "D" (dst)
 	    : "memory", "cc");
 
@@ -535,7 +535,7 @@ viac3_rnd(void *v)
 	 * sure that we turn on maximum whitening (%edx[0,1] == "11"), so
 	 * that we get the best random data possible.
 	 */
-	__asm __volatile("rep xstorerng"
+	__asm volatile("rep xstorerng"
 	    : "=a" (rv) : "d" (3), "D" (buffer), "c" (len*sizeof(int))
 	    : "memory", "cc");
 
diff --git a/sys/arch/i386/i386/vm86.c b/sys/arch/i386/i386/vm86.c
index f07226a8051..0c1477c17db 100644
--- a/sys/arch/i386/i386/vm86.c
+++ b/sys/arch/i386/i386/vm86.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: vm86.c,v 1.21 2011/07/05 04:48:01 guenther Exp $	*/
+/*	$OpenBSD: vm86.c,v 1.22 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: vm86.c,v 1.15 1996/05/03 19:42:33 christos Exp $	*/
 
 /*-
@@ -73,7 +73,7 @@ static __inline int is_bitset(int, caddr_t);
 
 
 #define putword(base, ptr, val) \
-__asm__ __volatile__( \
+__asm__ volatile( \
 	"decw %w0\n\t" \
 	"movb %h2,0(%1,%0)\n\t" \
 	"decw %w0\n\t" \
@@ -82,7 +82,7 @@ __asm__ __volatile__( \
 	: "r" (base), "q" (val), "0" (ptr))
 
 #define putdword(base, ptr, val) \
-__asm__ __volatile__( \
+__asm__ volatile( \
 	"rorl $16,%2\n\t" \
 	"decw %w0\n\t" \
 	"movb %h2,0(%1,%0)\n\t" \
@@ -98,7 +98,7 @@ __asm__ __volatile__( \
 
 #define getbyte(base, ptr) \
 ({ unsigned long __res; \
-__asm__ __volatile__( \
+__asm__ volatile( \
 	"movb 0(%1,%0),%b2\n\t" \
 	"incw %w0" \
 	: "=r" (ptr), "=r" (base), "=q" (__res) \
@@ -107,7 +107,7 @@ __res; })
 
 #define getword(base, ptr) \
 ({ unsigned long __res; \
-__asm__ __volatile__( \
+__asm__ volatile( \
 	"movb 0(%1,%0),%b2\n\t" \
 	"incw %w0\n\t" \
 	"movb 0(%1,%0),%h2\n\t" \
@@ -118,7 +118,7 @@ __res; })
 
 #define getdword(base, ptr) \
 ({ unsigned long __res; \
-__asm__ __volatile__( \
+__asm__ volatile( \
 	"movb 0(%1,%0),%b2\n\t" \
 	"incw %w0\n\t" \
 	"movb 0(%1,%0),%h2\n\t" \
@@ -143,7 +143,7 @@ is_bitset(int nr, caddr_t bitmap)
 	nr = nr % NBBY;
 	copyin(bitmap, &byte, sizeof(u_char));
 
-	__asm__ __volatile__("btl %2,%1\n\tsbbl %0,%0"
+	__asm__ volatile("btl %2,%1\n\tsbbl %0,%0"
 			     :"=r" (nr)
 			     :"r" (byte),"r" (nr));
 	return (nr);
diff --git a/sys/arch/i386/include/atomic.h b/sys/arch/i386/include/atomic.h
index eac3adc86c6..7791af060ca 100644
--- a/sys/arch/i386/include/atomic.h
+++ b/sys/arch/i386/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.11 2012/11/19 15:18:06 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.12 2014/03/29 18:09:29 guenther Exp $	*/
 /* $NetBSD: atomic.h,v 1.1.2.2 2000/02/21 18:54:07 sommerfeld Exp $ */
 
 /*-
@@ -75,14 +75,14 @@ i386_atomic_testset_i(volatile int *ptr, unsigned long val)
 static __inline void
 i386_atomic_setbits_l(volatile u_int32_t *ptr, unsigned long bits)
 {
-	__asm __volatile(LOCK " orl %1,%0" :  "=m" (*ptr) : "ir" (bits));
+	__asm volatile(LOCK " orl %1,%0" :  "=m" (*ptr) : "ir" (bits));
 }
 
 static __inline void
 i386_atomic_clearbits_l(volatile u_int32_t *ptr, unsigned long bits)
 {
 	bits = ~bits;
-	__asm __volatile(LOCK " andl %1,%0" :  "=m" (*ptr) : "ir" (bits));
+	__asm volatile(LOCK " andl %1,%0" :  "=m" (*ptr) : "ir" (bits));
 }
 
 /*
diff --git a/sys/arch/i386/include/bus.h b/sys/arch/i386/include/bus.h
index 010565d0d15..891a2c23a77 100644
--- a/sys/arch/i386/include/bus.h
+++ b/sys/arch/i386/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.60 2013/12/23 20:32:31 kettenis Exp $	*/
+/*	$OpenBSD: bus.h,v 1.61 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: bus.h,v 1.6 1996/11/10 03:19:25 thorpej Exp $	*/
 
 /*-
@@ -403,7 +403,7 @@ void	bus_space_copy_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
 #endif
 
 #define	i386_space_copy1(a1, a2, cnt, movs, df)		\
-	__asm __volatile(df "\n\trep\n\t" movs :	\
+	__asm volatile(df "\n\trep\n\t" movs :		\
 	    "+S" (a1), "+D" (a2), "+c" (cnt)	:: "memory", "cc");
 
 #define	i386_space_copy(a1, a2, sz, cnt) do {				\
@@ -434,7 +434,7 @@ void	bus_space_copy_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
  */
 #define	bus_space_barrier(t, h, o, l, f) do {				\
 	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)));\
-	__asm __volatile("" : : : "memory");				\
+	__asm volatile("" : : : "memory");				\
 } while (0)
 #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
 #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index 6894176b829..fec9ff29642 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.132 2014/02/13 23:11:06 kettenis Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.133 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $	*/
 
 /*-
@@ -208,7 +208,7 @@ curcpu(void)
 	struct cpu_info *ci;
 
 	/* Can't include sys/param.h for offsetof() since it includes us */
-	__asm __volatile("movl %%fs:%1, %0" :
+	__asm volatile("movl %%fs:%1, %0" :
 		"=r" (ci) : "m"
 		(*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self));
 	return ci;
diff --git a/sys/arch/i386/include/cpufunc.h b/sys/arch/i386/include/cpufunc.h
index b9e7bea23af..7b025d1bbd7 100644
--- a/sys/arch/i386/include/cpufunc.h
+++ b/sys/arch/i386/include/cpufunc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.h,v 1.21 2013/12/06 22:56:20 kettenis Exp $	*/
+/*	$OpenBSD: cpufunc.h,v 1.22 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: cpufunc.h,v 1.8 1994/10/27 04:15:59 cgd Exp $	*/
 
 /*
@@ -71,38 +71,38 @@ static __inline void breakpoint(void);
 static __inline void 
 invlpg(u_int addr)
 { 
-        __asm __volatile("invlpg (%0)" : : "r" (addr) : "memory");
+        __asm volatile("invlpg (%0)" : : "r" (addr) : "memory");
 }  
 
 static __inline void
 lidt(void *p)
 {
-	__asm __volatile("lidt (%0)" : : "r" (p) : "memory");
+	__asm volatile("lidt (%0)" : : "r" (p) : "memory");
 }
 
 static __inline void
 lldt(u_short sel)
 {
-	__asm __volatile("lldt %0" : : "r" (sel));
+	__asm volatile("lldt %0" : : "r" (sel));
 }
 
 static __inline void
 ltr(u_short sel)
 {
-	__asm __volatile("ltr %0" : : "r" (sel));
+	__asm volatile("ltr %0" : : "r" (sel));
 }
 
 static __inline void
 lcr0(u_int val)
 {
-	__asm __volatile("movl %0,%%cr0" : : "r" (val));
+	__asm volatile("movl %0,%%cr0" : : "r" (val));
 }
 
 static __inline u_int
 rcr0(void)
 {
 	u_int val;
-	__asm __volatile("movl %%cr0,%0" : "=r" (val));
+	__asm volatile("movl %%cr0,%0" : "=r" (val));
 	return val;
 }
 
@@ -110,35 +110,35 @@ static __inline u_int
 rcr2(void)
 {
 	u_int val;
-	__asm __volatile("movl %%cr2,%0" : "=r" (val));
+	__asm volatile("movl %%cr2,%0" : "=r" (val));
 	return val;
 }
 
 static __inline void
 lcr3(u_int val)
 {
-	__asm __volatile("movl %0,%%cr3" : : "r" (val));
+	__asm volatile("movl %0,%%cr3" : : "r" (val));
 }
 
 static __inline u_int
 rcr3(void)
 {
 	u_int val;
-	__asm __volatile("movl %%cr3,%0" : "=r" (val));
+	__asm volatile("movl %%cr3,%0" : "=r" (val));
 	return val;
 }
 
 static __inline void
 lcr4(u_int val)
 {
-	__asm __volatile("movl %0,%%cr4" : : "r" (val));
+	__asm volatile("movl %0,%%cr4" : : "r" (val));
 }
 
 static __inline u_int
 rcr4(void)
 {
 	u_int val;
-	__asm __volatile("movl %%cr4,%0" : "=r" (val));
+	__asm volatile("movl %%cr4,%0" : "=r" (val));
 	return val;
 }
 
@@ -146,8 +146,8 @@ static __inline void
 tlbflush(void)
 {
 	u_int val;
-	__asm __volatile("movl %%cr3,%0" : "=r" (val));
-	__asm __volatile("movl %0,%%cr3" : : "r" (val));
+	__asm volatile("movl %%cr3,%0" : "=r" (val));
+	__asm volatile("movl %0,%%cr3" : : "r" (val));
 }
 
 static __inline void
@@ -191,13 +191,13 @@ void	setidt(int idx, /*XXX*/caddr_t func, int typ, int dpl);
 static __inline void
 disable_intr(void)
 {
-	__asm __volatile("cli");
+	__asm volatile("cli");
 }
 
 static __inline void
 enable_intr(void)
 {
-	__asm __volatile("sti");
+	__asm volatile("sti");
 }
 
 static __inline u_int
@@ -205,38 +205,38 @@ read_eflags(void)
 {
 	u_int ef;
 
-	__asm __volatile("pushfl; popl %0" : "=r" (ef));
+	__asm volatile("pushfl; popl %0" : "=r" (ef));
 	return (ef);
 }
 
 static __inline void
 write_eflags(u_int ef)
 {
-	__asm __volatile("pushl %0; popfl" : : "r" (ef));
+	__asm volatile("pushl %0; popfl" : : "r" (ef));
 }
 
 static __inline void
 wbinvd(void)
 {
-        __asm __volatile("wbinvd");
+        __asm volatile("wbinvd");
 }
 
 static __inline void
 clflush(u_int32_t addr)
 {
-	__asm __volatile("clflush %0" : "+m" (*(volatile char *)addr));
+	__asm volatile("clflush %0" : "+m" (*(volatile char *)addr));
 }
 
 static __inline void
 mfence(void)
 {
-	__asm __volatile("mfence" : : : "memory");
+	__asm volatile("mfence" : : : "memory");
 }
 
 static __inline void
 wrmsr(u_int msr, u_int64_t newval)
 {
-        __asm __volatile("wrmsr" : : "A" (newval), "c" (msr));
+        __asm volatile("wrmsr" : : "A" (newval), "c" (msr));
 }
 
 static __inline u_int64_t
@@ -244,21 +244,21 @@ rdmsr(u_int msr)
 {
         u_int64_t rv;
 
-        __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr));
+        __asm volatile("rdmsr" : "=A" (rv) : "c" (msr));
         return (rv);
 }
 
 static __inline void
 monitor(const volatile void *addr, u_long extensions, u_int hints)
 {
-	__asm __volatile("monitor"
+	__asm volatile("monitor"
 	    : : "a" (addr), "c" (extensions), "d" (hints));
 }
 
 static __inline void
 mwait(u_long extensions, u_int hints)
 {
-	__asm __volatile("mwait" : : "a" (hints), "c" (extensions));
+	__asm volatile("mwait" : : "a" (hints), "c" (extensions));
 }
 
 /* 
@@ -291,7 +291,7 @@ wrmsr_locked(u_int msr, u_int code, u_int64_t newval)
 static __inline void
 breakpoint(void)
 {
-	__asm __volatile("int $3");
+	__asm volatile("int $3");
 }
 
 #define read_psl()	read_eflags()
diff --git a/sys/arch/i386/include/intr.h b/sys/arch/i386/include/intr.h
index a8278c9422f..8716a2c3c68 100644
--- a/sys/arch/i386/include/intr.h
+++ b/sys/arch/i386/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.43 2011/07/05 17:11:07 oga Exp $	*/
+/*	$OpenBSD: intr.h,v 1.44 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $	*/
 
 /*
@@ -62,7 +62,7 @@ extern void softintr(int);
  * this "instruction", acting as a sequence point for code generation.
  */
 
-#define	__splbarrier() __asm __volatile("":::"memory")
+#define	__splbarrier() __asm volatile("":::"memory")
 
 /* SPL asserts */
 #ifdef DIAGNOSTIC
diff --git a/sys/arch/i386/include/lock.h b/sys/arch/i386/include/lock.h
index 7a3a8ffe482..d1d39f704e5 100644
--- a/sys/arch/i386/include/lock.h
+++ b/sys/arch/i386/include/lock.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock.h,v 1.8 2013/05/21 20:05:30 tedu Exp $	*/
+/*	$OpenBSD: lock.h,v 1.9 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: lock.h,v 1.1.2.2 2000/05/03 14:40:55 sommerfeld Exp $	*/
 
 /*-
@@ -45,9 +45,9 @@
  * this "instruction", acting as a sequence point for code generation.
  */
 
-#define __lockbarrier() __asm __volatile("": : :"memory")
+#define __lockbarrier() __asm volatile("": : :"memory")
 
-#define SPINLOCK_SPIN_HOOK	__asm __volatile("pause": : :"memory")
+#define SPINLOCK_SPIN_HOOK	__asm volatile("pause": : :"memory")
 
 #include <machine/atomic.h>
 
diff --git a/sys/arch/i386/include/mutex.h b/sys/arch/i386/include/mutex.h
index b4ae1145ed4..cfcb0435e62 100644
--- a/sys/arch/i386/include/mutex.h
+++ b/sys/arch/i386/include/mutex.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.h,v 1.6 2013/07/14 18:22:07 kettenis Exp $	*/
+/*	$OpenBSD: mutex.h,v 1.7 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -32,7 +32,7 @@
  *	 as the lock to save some space.
  */
 struct mutex {
-	__volatile int mtx_lock;
+	volatile int mtx_lock;
 	int mtx_wantipl;
 	int mtx_oldipl;
 	void *mtx_owner;
diff --git a/sys/arch/i386/include/pctr.h b/sys/arch/i386/include/pctr.h
index 9e8b99fce5b..294507edaf1 100644
--- a/sys/arch/i386/include/pctr.h
+++ b/sys/arch/i386/include/pctr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pctr.h,v 1.16 2011/03/23 16:54:35 pirofti Exp $	*/
+/*	$OpenBSD: pctr.h,v 1.17 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Pentium performance counter driver for OpenBSD.
@@ -58,7 +58,7 @@ struct pctrst {
 #define rdtsc()							\
 ({								\
 	pctrval v;						\
-	__asm __volatile ("rdtsc" : "=A" (v));			\
+	__asm volatile ("rdtsc" : "=A" (v));			\
 	v;							\
 })
 
@@ -66,7 +66,7 @@ struct pctrst {
 #define rdpmc(ctr)						\
 ({								\
 	pctrval v;						\
-	__asm __volatile ("rdpmc\n"				\
+	__asm volatile ("rdpmc\n"				\
 	    "\tandl $0xff, %%edx"				\
 	    : "=A" (v) : "c" (ctr));				\
 	v;							\
@@ -77,12 +77,12 @@ struct pctrst {
 #define rdmsr(msr)						\
 ({								\
 	pctrval v;						\
-	__asm __volatile ("rdmsr" : "=A" (v) : "c" (msr));	\
+	__asm volatile ("rdmsr" : "=A" (v) : "c" (msr));	\
 	v;							\
 })
 
 #define wrmsr(msr, v) \
-	__asm __volatile ("wrmsr" :: "A" ((u_int64_t) (v)), "c" (msr));
+	__asm volatile ("wrmsr" :: "A" ((u_int64_t) (v)), "c" (msr));
 
 void	pctrattach(int);
 int	pctropen(dev_t, int, int, struct proc *);
diff --git a/sys/arch/i386/include/pio.h b/sys/arch/i386/include/pio.h
index bd56b0f6e07..284c7d702f9 100644
--- a/sys/arch/i386/include/pio.h
+++ b/sys/arch/i386/include/pio.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pio.h,v 1.10 2011/03/23 16:54:35 pirofti Exp $	*/
+/*	$OpenBSD: pio.h,v 1.11 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: pio.h,v 1.13 1996/03/08 20:15:23 cgd Exp $	*/
 
 /*
@@ -61,7 +61,7 @@ static __inline u_int8_t
 __inbc(int port)
 {
 	u_int8_t data;
-	__asm __volatile("inb %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inb %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -69,14 +69,14 @@ static __inline u_int8_t
 __inb(int port)
 {
 	u_int8_t data;
-	__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
 static __inline void
 insb(int port, void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\tinsb"
+	__asm volatile("cld\n\trepne\n\tinsb"
 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
 }
 
@@ -87,7 +87,7 @@ static __inline u_int16_t
 __inwc(int port)
 {
 	u_int16_t data;
-	__asm __volatile("inw %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inw %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -95,14 +95,14 @@ static __inline u_int16_t
 __inw(int port)
 {
 	u_int16_t data;
-	__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inw %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
 static __inline void
 insw(int port, void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\tinsw"
+	__asm volatile("cld\n\trepne\n\tinsw"
 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
 }
 
@@ -113,7 +113,7 @@ static __inline u_int32_t
 __inlc(int port)
 {
 	u_int32_t data;
-	__asm __volatile("inl %w1,%0" : "=a" (data) : "id" (port));
+	__asm volatile("inl %w1,%0" : "=a" (data) : "id" (port));
 	return data;
 }
 
@@ -121,14 +121,14 @@ static __inline u_int32_t
 __inl(int port)
 {
 	u_int32_t data;
-	__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
+	__asm volatile("inl %w1,%0" : "=a" (data) : "d" (port));
 	return data;
 }
 
 static __inline void
 insl(int port, void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\tinsl"
+	__asm volatile("cld\n\trepne\n\tinsl"
 	    : "+D" (addr), "+c" (cnt) : "d" (port) : "memory", "cc");
 }
 
@@ -138,19 +138,19 @@ insl(int port, void *addr, int cnt)
 static __inline void
 __outbc(int port, u_int8_t data)
 {
-	__asm __volatile("outb %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outb %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outb(int port, u_int8_t data)
 {
-	__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outb %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
 outsb(int port, const void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\toutsb"
+	__asm volatile("cld\n\trepne\n\toutsb"
 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
 }
 
@@ -160,19 +160,19 @@ outsb(int port, const void *addr, int cnt)
 static __inline void
 __outwc(int port, u_int16_t data)
 {
-	__asm __volatile("outw %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outw %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outw(int port, u_int16_t data)
 {
-	__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outw %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
 outsw(int port, const void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\toutsw"
+	__asm volatile("cld\n\trepne\n\toutsw"
 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
 }
 
@@ -182,19 +182,19 @@ outsw(int port, const void *addr, int cnt)
 static __inline void
 __outlc(int port, u_int32_t data)
 {
-	__asm __volatile("outl %0,%w1" : : "a" (data), "id" (port));
+	__asm volatile("outl %0,%w1" : : "a" (data), "id" (port));
 }
 
 static __inline void
 __outl(int port, u_int32_t data)
 {
-	__asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
+	__asm volatile("outl %0,%w1" : : "a" (data), "d" (port));
 }
 
 static __inline void
 outsl(int port, const void *addr, int cnt)
 {
-	__asm __volatile("cld\n\trepne\n\toutsl"
+	__asm volatile("cld\n\trepne\n\toutsl"
 	    : "+S" (addr), "+c" (cnt) : "d" (port) : "cc");
 }
 
diff --git a/sys/arch/i386/include/profile.h b/sys/arch/i386/include/profile.h
index 02d7429ae8c..6bba09b424f 100644
--- a/sys/arch/i386/include/profile.h
+++ b/sys/arch/i386/include/profile.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: profile.h,v 1.11 2010/07/09 18:44:10 kettenis Exp $	*/
+/*	$OpenBSD: profile.h,v 1.12 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: profile.h,v 1.6 1995/03/28 18:17:08 jtc Exp $	*/
 
 /*
@@ -52,11 +52,11 @@ mcount(void)								\
 	 *								\
 	 * selfpc = pc pushed by mcount call				\
 	 */								\
-	__asm __volatile ("movl 4(%%ebp),%0" : "=r" (selfpc));		\
+	__asm volatile ("movl 4(%%ebp),%0" : "=r" (selfpc));		\
 	/*								\
 	 * frompcindex = pc pushed by call into self.			\
 	 */								\
-	__asm __volatile ("movl (%%ebp),%0;movl 4(%0),%0" :		\
+	__asm volatile ("movl (%%ebp),%0;movl 4(%0),%0" :		\
 	    "+r" (frompcindex));					\
 	_mcount(frompcindex, selfpc);					\
 									\
diff --git a/sys/arch/i386/isa/clock.c b/sys/arch/i386/isa/clock.c
index 50487a73e63..ce24364c479 100644
--- a/sys/arch/i386/isa/clock.c
+++ b/sys/arch/i386/isa/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.49 2013/05/06 00:15:11 dlg Exp $	*/
+/*	$OpenBSD: clock.c,v 1.50 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: clock.c,v 1.39 1996/05/12 23:11:54 mycroft Exp $	*/
 
 /*-
@@ -342,7 +342,7 @@ i8254_delay(int n)
 	n -= 5;
 	if (n < 0)
 		return;
-	__asm __volatile("mul %2\n\tdiv %3"
+	__asm volatile("mul %2\n\tdiv %3"
 			 : "=a" (n)
 			 : "0" (n), "r" (TIMER_FREQ), "r" (1000000)
 			 : "%edx", "cc");
@@ -422,9 +422,9 @@ calibrate_cyclecounter(void)
 	if (calibrate_cyclecounter_ctr() == 0)
 		return;
 
-	__asm __volatile("rdtsc" : "=A" (last_count));
+	__asm volatile("rdtsc" : "=A" (last_count));
 	delay(1000000);
-	__asm __volatile("rdtsc" : "=A" (count));
+	__asm volatile("rdtsc" : "=A" (count));
 
 	cpuspeed = ((count - last_count) + 999999) / 1000000;
 }
diff --git a/sys/arch/i386/isa/npx.c b/sys/arch/i386/isa/npx.c
index 6ea986097f0..4adcef4827b 100644
--- a/sys/arch/i386/isa/npx.c
+++ b/sys/arch/i386/isa/npx.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: npx.c,v 1.59 2013/11/16 21:00:02 brad Exp $	*/
+/*	$OpenBSD: npx.c,v 1.60 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: npx.c,v 1.57 1996/05/12 23:12:24 mycroft Exp $	*/
 
 #if 0
@@ -688,7 +688,7 @@ npxdna_xmm(struct cpu_info *ci)
 		 * thus leaking other process's execution history.
 		 */
 		fnclex();
-		__asm __volatile("ffree %%st(7)\n\tfldl %0" : : "m" (zero));
+		__asm volatile("ffree %%st(7)\n\tfldl %0" : : "m" (zero));
 		fxrstor(&sfp->sv_xmm);
 	}
 
diff --git a/sys/arch/i386/pci/pcibios.c b/sys/arch/i386/pci/pcibios.c
index 0e9cdd13987..d76416427fe 100644
--- a/sys/arch/i386/pci/pcibios.c
+++ b/sys/arch/i386/pci/pcibios.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pcibios.c,v 1.43 2013/11/28 19:30:46 brad Exp $	*/
+/*	$OpenBSD: pcibios.c,v 1.44 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: pcibios.c,v 1.5 2000/08/01 05:23:59 uch Exp $	*/
 
 /*
@@ -342,7 +342,7 @@ pcibios_get_status(struct pcibios_softc *sc, u_int32_t *rev_maj,
 	u_int32_t ax, bx, cx, edx;
 	int rv;
 
-	__asm __volatile("pushl	%%es\n\t"
+	__asm volatile("pushl	%%es\n\t"
 			 "pushl	%%ds\n\t"
 			 "movw	4(%%edi), %%cx\n\t"
 			 "movl	%%ecx, %%ds\n\t"
@@ -395,7 +395,7 @@ pcibios_get_intr_routing(struct pcibios_softc *sc,
 
 	memset(table, 0, args.size);
 
-	__asm __volatile("pushl	%%es\n\t"
+	__asm volatile("pushl	%%es\n\t"
 			 "pushl	%%ds\n\t"
 			 "movw	4(%%esi), %%cx\n\t"
 			 "movl	%%ecx, %%ds\n\t"
diff --git a/sys/arch/i386/pci/piixpcib.c b/sys/arch/i386/pci/piixpcib.c
index b94d5fc6f0d..0107c18b380 100644
--- a/sys/arch/i386/pci/piixpcib.c
+++ b/sys/arch/i386/pci/piixpcib.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: piixpcib.c,v 1.8 2013/05/30 16:15:01 deraadt Exp $ */
+/*	$OpenBSD: piixpcib.c,v 1.9 2014/03/29 18:09:29 guenther Exp $ */
 
 /*
  * Copyright (c) 2007 Stefan Sperling <stsp@stsp.in-berlin.de>
@@ -167,7 +167,7 @@ piixpcib_set_ownership(struct piixpcib_softc *sc)
 
 	pmap_extract(pmap_kernel(), (vaddr_t)magic, &pmagic);
 
-	__asm __volatile(
+	__asm volatile(
 		"movl $0, %%edi\n\t"
 		"out %%al, (%%dx)\n"
 		: "=D" (rv)
@@ -264,7 +264,7 @@ piixpcib_getset_state(struct piixpcib_softc *sc, int *state, int function)
 	}
 #endif
 
-	__asm __volatile(
+	__asm volatile(
 		"movl $0, %%edi\n\t"
 		"out %%al, (%%dx)\n"
 		: "=a" (eax),
diff --git a/sys/arch/i386/stand/libsa/apmprobe.c b/sys/arch/i386/stand/libsa/apmprobe.c
index ed509886cfe..c222e12aea8 100644
--- a/sys/arch/i386/stand/libsa/apmprobe.c
+++ b/sys/arch/i386/stand/libsa/apmprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: apmprobe.c,v 1.16 2013/03/21 21:51:00 deraadt Exp $	*/
+/*	$OpenBSD: apmprobe.c,v 1.17 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-2000 Michael Shalayeff
@@ -73,7 +73,7 @@ apm_check(void)
 	register u_int detail;
 	register u_int8_t f;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %b1\n\t"
 	    "movzwl %%ax, %0\n\t"
 	    "shll $16, %%ecx\n\t"
@@ -98,7 +98,7 @@ apm_disconnect(void)
 {
 	register u_int16_t rv;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %b0"
 	    : "=a" (rv)
 	    : "0" (APM_DISCONNECT), "b" (APM_DEV_APM_BIOS)
@@ -112,7 +112,7 @@ apm_connect(bios_apminfo_t *ai)
 {
 	register u_int16_t f;
 
-	__asm __volatile (DOINT(0x15) "\n\t"
+	__asm volatile (DOINT(0x15) "\n\t"
 	    "setc %b1\n\t"
 	    "movb %%ah, %h1\n\t"
 	    "movzwl %%ax, %%eax\n\tshll $4, %0\n\t"
@@ -149,7 +149,7 @@ apm_connect(bios_apminfo_t *ai)
 		    ai->apm_data_base,   ai->apm_data_len);
 #endif
 	/* inform apm bios about our driver version */
-	__asm __volatile (DOINT(0x15) "\n\t"
+	__asm volatile (DOINT(0x15) "\n\t"
 	    "setc %b1\n\t"
 	    "movb %%ah, %h1"
 	    : "=b" (f)
diff --git a/sys/arch/i386/stand/libsa/bioscons.c b/sys/arch/i386/stand/libsa/bioscons.c
index ff057733b6c..028bef396d2 100644
--- a/sys/arch/i386/stand/libsa/bioscons.c
+++ b/sys/arch/i386/stand/libsa/bioscons.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bioscons.c,v 1.34 2012/10/30 14:06:29 jsing Exp $	*/
+/*	$OpenBSD: bioscons.c,v 1.35 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-1999 Michael Shalayeff
@@ -75,7 +75,7 @@ pc_getc(dev_t dev)
 	register int rv;
 
 	if (dev & 0x80) {
-		__asm __volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
+		__asm volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
 		    "0" (0x100) : "%ecx", "%edx", "cc" );
 		return (rv & 0xff);
 	}
@@ -85,11 +85,11 @@ pc_getc(dev_t dev)
 	 * be necessary on (at least) the Intel Mac Mini.
 	 */
 	do {
-		__asm __volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
+		__asm volatile(DOINT(0x16) "; setnz %b0" : "=a" (rv) :
 		    "0" (0x100) : "%ecx", "%edx", "cc" );
 	} while ((rv & 0xff) == 0);
 
-	__asm __volatile(DOINT(0x16) : "=a" (rv) : "0" (0x000) :
+	__asm volatile(DOINT(0x16) : "=a" (rv) : "0" (0x000) :
 	    "%ecx", "%edx", "cc" );
 
 	return (rv & 0xff);
@@ -100,7 +100,7 @@ pc_getshifts(dev_t dev)
 {
 	register int rv;
 
-	__asm __volatile(DOINT(0x16) : "=a" (rv) : "0" (0x200) :
+	__asm volatile(DOINT(0x16) : "=a" (rv) : "0" (0x200) :
 	    "%ecx", "%edx", "cc" );
 
 	return (rv & 0xff);
@@ -109,7 +109,7 @@ pc_getshifts(dev_t dev)
 void
 pc_putc(dev_t dev, int c)
 {
-	__asm __volatile(DOINT(0x10) : : "a" (c | 0xe00), "b" (1) :
+	__asm volatile(DOINT(0x10) : : "a" (c | 0xe00), "b" (1) :
 	    "%ecx", "%edx", "cc" );
 }
 
@@ -121,7 +121,7 @@ com_probe(struct consdev *cn)
 	register int i, n;
 
 	/* get equip. (9-11 # of coms) */
-	__asm __volatile(DOINT(0x11) : "=a" (n) : : "%ecx", "%edx", "cc");
+	__asm volatile(DOINT(0x11) : "=a" (n) : : "%ecx", "%edx", "cc");
 	n >>= 9;
 	n &= 7;
 	for (i = 0; i < n; i++)
diff --git a/sys/arch/i386/stand/libsa/biosdev.c b/sys/arch/i386/stand/libsa/biosdev.c
index fcc2681c09f..2e2911378fa 100644
--- a/sys/arch/i386/stand/libsa/biosdev.c
+++ b/sys/arch/i386/stand/libsa/biosdev.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: biosdev.c,v 1.88 2013/12/28 02:40:41 jsing Exp $	*/
+/*	$OpenBSD: biosdev.c,v 1.89 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1996 Michael Shalayeff
@@ -76,7 +76,7 @@ biosdreset(int dev)
 {
 	int rv;
 
-	__asm __volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
+	__asm volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
 	    : "0" (0), "d" (dev) : "%ecx", "cc");
 
 	return ((rv & 0xff)? rv >> 8 : 0);
@@ -99,7 +99,7 @@ bios_getdiskinfo(int dev, bios_diskinfo_t *pdi)
 	if (debug)
 		printf("getinfo: try #8, 0x%x, %p\n", dev, pdi);
 #endif
-	__asm __volatile (DOINT(0x13) "\n\t"
+	__asm volatile (DOINT(0x13) "\n\t"
 	    "setc %b0; movzbl %h1, %1\n\t"
 	    "movzbl %%cl, %3; andb $0x3f, %b3\n\t"
 	    "xchgb %%cl, %%ch; rolb $2, %%ch"
@@ -142,7 +142,7 @@ bios_getdiskinfo(int dev, bios_diskinfo_t *pdi)
 			printf("getinfo: try #41, 0x%x\n", dev);
 #endif
 		/* EDD support check */
-		__asm __volatile(DOINT(0x13) "; setc %b0"
+		__asm volatile(DOINT(0x13) "; setc %b0"
 			 : "=a" (rv), "=c" (bm)
 			 : "0" (0x4100), "b" (0x55aa), "d" (dev) : "cc");
 		if (!(rv & 0xff) && (BIOS_regs.biosr_bx & 0xffff) == 0xaa55)
@@ -190,7 +190,7 @@ CHS_rw(int rw, int dev, int cyl, int head, int sect, int nsect, void *buf)
 
 	rw = rw == F_READ ? 2 : 3;
 	BIOS_regs.biosr_es = (u_int32_t)buf >> 4;
-	__asm __volatile ("movb %b7, %h1\n\t"
+	__asm volatile ("movb %b7, %h1\n\t"
 	    "movb %b6, %%dh\n\t"
 	    "andl $0xf, %4\n\t"
 	    /* cylinder; the highest 2 bits of cyl is in %cl */
@@ -232,7 +232,7 @@ EDD_rw(int rw, int dev, u_int32_t daddr, u_int32_t nblk, void *buf)
 
 	/* Call extended read/write (with disk packet) */
 	BIOS_regs.biosr_ds = (u_int32_t)&cb >> 4;
-	__asm __volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
+	__asm volatile (DOINT(0x13) "; setc %b0" : "=a" (rv)
 	    : "0" ((rw == F_READ)? 0x4200: 0x4300),
 	      "d" (dev), "S" ((int) (&cb) & 0xf) : "%ecx", "cc");
 	return ((rv & 0xff)? rv >> 8 : 0);
diff --git a/sys/arch/i386/stand/libsa/biosprobe.c b/sys/arch/i386/stand/libsa/biosprobe.c
index fddb84bb78d..d0ee5fdf7b1 100644
--- a/sys/arch/i386/stand/libsa/biosprobe.c
+++ b/sys/arch/i386/stand/libsa/biosprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: biosprobe.c,v 1.4 2004/03/09 19:12:12 tom Exp $	*/
+/*	$OpenBSD: biosprobe.c,v 1.5 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2002 Tobias Weingartner
@@ -42,7 +42,7 @@ getSYSCONFaddr(void)
 	u_int32_t status;
 	u_int8_t *vers;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %%al\n\t"
 	    : "=a" (status)
 	    : "0" (0xC000)
@@ -68,7 +68,7 @@ getEBDAaddr(void)
 	if (!info)
 		return NULL;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 	    "setc %%al"
 	    : "=a" (status)
 	    : "0" (0xC100)
diff --git a/sys/arch/i386/stand/libsa/cpuprobe.c b/sys/arch/i386/stand/libsa/cpuprobe.c
index 286a72cc7d9..335b2f46dc8 100644
--- a/sys/arch/i386/stand/libsa/cpuprobe.c
+++ b/sys/arch/i386/stand/libsa/cpuprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpuprobe.c,v 1.1 2004/06/26 05:19:37 tom Exp $	*/
+/*	$OpenBSD: cpuprobe.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Tom Cosgrove <tom.cosgrove@arches-consulting.com>
@@ -35,7 +35,7 @@ static char cpu_vendor[13];		/* 12 chars plus NUL term */
 u_int32_t
 cpuid(u_int32_t eax, u_int32_t *regs)
 {
-	__asm __volatile(
+	__asm volatile(
 	    "cpuid\n\t"
 	    "movl	%%eax, 0(%2)\n\t"
 	    "movl	%%ebx, 4(%2)\n\t"
@@ -71,7 +71,7 @@ cpuprobe(void)
 	 *     does not support cpuid but which does allow the PSL_ID bit
 	 *     in eflags to be toggled.
 	 */
-	__asm __volatile(
+	__asm volatile(
 	    "pushfl\n\t"
 	    "popl	%2\n\t"
 	    "xorl	%2, %0\n\t"
diff --git a/sys/arch/i386/stand/libsa/memprobe.c b/sys/arch/i386/stand/libsa/memprobe.c
index 10645562b64..aab27dbe97f 100644
--- a/sys/arch/i386/stand/libsa/memprobe.c
+++ b/sys/arch/i386/stand/libsa/memprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: memprobe.c,v 1.52 2013/03/21 21:51:00 deraadt Exp $	*/
+/*	$OpenBSD: memprobe.c,v 1.53 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997-1999 Michael Shalayeff
@@ -73,7 +73,7 @@ bios_E820(bios_memmap_t *mp)
 
 	do {
 		BIOS_regs.biosr_es = ((u_int)(mp) >> 4);
-		__asm __volatile(DOINT(0x15) "; setc %b1"
+		__asm volatile(DOINT(0x15) "; setc %b1"
 		    : "=a" (sig), "=d" (rc), "=b" (off)
 		    : "0" (0xE820), "1" (0x534d4150), "b" (off),
 		      "c" (sizeof(*mp)), "D" (((u_int)mp) & 0xf)
@@ -125,7 +125,7 @@ bios_E801(bios_memmap_t *mp)
 		return NULL;
 
 	/* We might have this call */
-	__asm __volatile(DOINT(0x15) "; mov %%ax, %%si; setc %b0"
+	__asm volatile(DOINT(0x15) "; mov %%ax, %%si; setc %b0"
 	    : "=a" (rc), "=S" (m1), "=b" (m2), "=c" (m3), "=d" (m4)
 	    : "0" (0xE801));
 
@@ -166,7 +166,7 @@ bios_8800(bios_memmap_t *mp)
 {
 	int rc, mem;
 
-	__asm __volatile(DOINT(0x15) "; setc %b0"
+	__asm volatile(DOINT(0x15) "; setc %b0"
 	    : "=c" (rc), "=a" (mem) : "a" (0x8800));
 
 	if (rc & 0xff)
@@ -194,7 +194,7 @@ bios_int12(bios_memmap_t *mp)
 #ifdef DEBUG
 	printf("0x12 ");
 #endif
-	__asm __volatile(DOINT(0x12) : "=a" (mem) :: "%ecx", "%edx", "cc");
+	__asm volatile(DOINT(0x12) : "=a" (mem) :: "%ecx", "%edx", "cc");
 
 	/* Fill out a bios_memmap_t */
 	mp->addr = 0;
@@ -227,7 +227,7 @@ const u_int addrprobe_pat[] = {
 static int
 addrprobe(u_int kloc)
 {
-	__volatile u_int *loc;
+	volatile u_int *loc;
 	register u_int i, ret = 0;
 	u_int save[nitems(addrprobe_pat)];
 
diff --git a/sys/arch/i386/stand/libsa/pciprobe.c b/sys/arch/i386/stand/libsa/pciprobe.c
index 15c25c5c0e8..9854aa4cb5b 100644
--- a/sys/arch/i386/stand/libsa/pciprobe.c
+++ b/sys/arch/i386/stand/libsa/pciprobe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciprobe.c,v 1.9 2008/10/04 23:08:22 deraadt Exp $	*/
+/*	$OpenBSD: pciprobe.c,v 1.10 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997 Tobias Weingartner
@@ -42,7 +42,7 @@ pciprobe(void)
 	u_int32_t entry32;
 
 	/* PCI BIOS v2.0c+ - Installation Check */
-	__asm __volatile(DOINT(0x1A) "; shll $8,%2; setc %b2"
+	__asm volatile(DOINT(0x1A) "; shll $8,%2; setc %b2"
 		: "=a" (hw_chars), "=b" (rev), "=c" (rc),
 		  "=d" (sig), "=D" (entry32)
 		: "0" (0xB101), "4" (0x0)
diff --git a/sys/arch/i386/stand/libsa/ps2probe.c b/sys/arch/i386/stand/libsa/ps2probe.c
index 898fe5cf54f..bd80f9472d7 100644
--- a/sys/arch/i386/stand/libsa/ps2probe.c
+++ b/sys/arch/i386/stand/libsa/ps2probe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ps2probe.c,v 1.1 2004/03/19 13:48:18 tom Exp $	*/
+/*	$OpenBSD: ps2probe.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2001 Michael Shalayeff
@@ -36,7 +36,7 @@ ps2probe(void)
 	char *p;
 	int r;
 
-	__asm __volatile(DOINT(0x15) "\n\t"
+	__asm volatile(DOINT(0x15) "\n\t"
 			 "setc %b0\n\t"
 			 : "=a" (r), "=b" (p)
 			 : "0" (0xc000)
diff --git a/sys/arch/i386/stand/libsa/time.c b/sys/arch/i386/stand/libsa/time.c
index 581e2f8b87e..ddcdc10c626 100644
--- a/sys/arch/i386/stand/libsa/time.c
+++ b/sys/arch/i386/stand/libsa/time.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: time.c,v 1.17 2012/10/30 14:06:29 jsing Exp $	*/
+/*	$OpenBSD: time.c,v 1.18 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997 Michael Shalayeff
@@ -76,7 +76,7 @@ compute(int year, u_int8_t month, u_int8_t day, u_int8_t hour,
 static int
 bios_time_date(int f, u_int8_t *b)
 {
-	__asm __volatile(DOINT(0x1a) "\n\t"
+	__asm volatile(DOINT(0x1a) "\n\t"
 	    "setc %b0\n\t"
 	    "movb %%ch, 0(%2)\n\t"
 	    "movb %%cl, 1(%2)\n\t"
diff --git a/sys/arch/ia64/include/mutex.h b/sys/arch/ia64/include/mutex.h
index f035892c210..4b22ee44afe 100644
--- a/sys/arch/ia64/include/mutex.h
+++ b/sys/arch/ia64/include/mutex.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.h,v 1.1 2011/07/04 23:29:08 pirofti Exp $	*/
+/*	$OpenBSD: mutex.h,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -30,7 +30,7 @@
 struct mutex {
 	int mtx_wantipl;
 	int mtx_oldipl;
-	__volatile void *mtx_owner;
+	volatile void *mtx_owner;
 };
 
 #define MUTEX_INITIALIZER(ipl) { (ipl), 0, NULL }
diff --git a/sys/arch/landisk/landisk/intr.c b/sys/arch/landisk/landisk/intr.c
index 1410089540e..7e73e7c3c2f 100644
--- a/sys/arch/landisk/landisk/intr.c
+++ b/sys/arch/landisk/landisk/intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.c,v 1.7 2011/04/15 20:40:07 deraadt Exp $	*/
+/*	$OpenBSD: intr.c,v 1.8 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: intr.c,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/
 
 /*-
@@ -377,7 +377,7 @@ splassert_check(int wantipl, const char *func)
 	register_t sr;
         int oldipl;
 
-	__asm__ __volatile__ ("stc sr,%0" : "=r" (sr));
+	__asm__ volatile ("stc sr,%0" : "=r" (sr));
 
 	oldipl = (sr & 0xf0) >> 4;
         if (oldipl < wantipl) {
diff --git a/sys/arch/loongson/include/bus.h b/sys/arch/loongson/include/bus.h
index 676c5cd0d49..640d7348f63 100644
--- a/sys/arch/loongson/include/bus.h
+++ b/sys/arch/loongson/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.4 2014/03/10 21:32:15 miod Exp $	*/
+/*	$OpenBSD: bus.h,v 1.5 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB Sweden.  All rights reserved.
@@ -327,7 +327,7 @@ static inline void
 bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
     bus_size_t length, int flags)
 {
-	__asm__ __volatile__ ("sync" ::: "memory");
+	__asm__ volatile ("sync" ::: "memory");
 }
 #define BUS_SPACE_BARRIER_READ  0x01		/* force read barrier */
 #define BUS_SPACE_BARRIER_WRITE 0x02		/* force write barrier */
diff --git a/sys/arch/luna88k/stand/boot/fault.c b/sys/arch/luna88k/stand/boot/fault.c
index 24b218a1bc3..51339f4ef63 100644
--- a/sys/arch/luna88k/stand/boot/fault.c
+++ b/sys/arch/luna88k/stand/boot/fault.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fault.c,v 1.1 2013/10/28 22:13:12 miod Exp $	*/
+/*	$OpenBSD: fault.c,v 1.2 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2013 Miodrag Vallat.
@@ -43,14 +43,14 @@ static __inline__ uint32_t
 get_vbr()
 {
 	uint32_t vbr;
-	__asm__ __volatile__ ("ldcr %0, %%cr7" : "=r"(vbr));
+	__asm__ volatile ("ldcr %0, %%cr7" : "=r"(vbr));
 	return vbr;
 }
 
 static __inline__ void
 set_vbr(uint32_t vbr)
 {
-	__asm__ __volatile__ ("stcr %0, %%cr7" :: "r"(vbr));
+	__asm__ volatile ("stcr %0, %%cr7" :: "r"(vbr));
 }
 
 /*
diff --git a/sys/arch/m88k/include/asm_macro.h b/sys/arch/m88k/include/asm_macro.h
index 9bac0eb6dc1..8875521b8ca 100644
--- a/sys/arch/m88k/include/asm_macro.h
+++ b/sys/arch/m88k/include/asm_macro.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: asm_macro.h,v 1.9 2013/01/05 11:20:56 miod Exp $ */
+/*	$OpenBSD: asm_macro.h,v 1.10 2014/03/29 18:09:29 guenther Exp $ */
 /*
  * Mach Operating System
  * Copyright (c) 1993-1991 Carnegie Mellon University
@@ -38,14 +38,14 @@
  * Flush the data pipeline.
  */
 #define	flush_pipeline() \
-	__asm__ __volatile__ ("tb1 0, %%r0, 0" ::: "memory")
+	__asm__ volatile ("tb1 0, %%r0, 0" ::: "memory")
 
 /*
  * Set the PSR.
  */
 static __inline__ void set_psr(u_int psr)
 {
-	__asm__ __volatile__ ("stcr %0, %%cr1" :: "r" (psr));
+	__asm__ volatile ("stcr %0, %%cr1" :: "r" (psr));
 	flush_pipeline();
 }
 
@@ -55,7 +55,7 @@ static __inline__ void set_psr(u_int psr)
 static __inline__ u_int get_psr(void)
 {
 	u_int psr;
-	__asm__ __volatile__ ("ldcr %0, %%cr1" : "=r" (psr));
+	__asm__ volatile ("ldcr %0, %%cr1" : "=r" (psr));
 	return (psr);
 }
 
@@ -64,14 +64,14 @@ static __inline__ u_int get_psr(void)
  */
 static __inline__ u_int ff1(u_int val)
 {
-	__asm__ __volatile__ ("ff1 %0, %0" : "=r" (val) : "0" (val));
+	__asm__ volatile ("ff1 %0, %0" : "=r" (val) : "0" (val));
 	return (val);
 }
 
 static __inline__ u_int get_cpu_pid(void)
 {
 	u_int pid;
-	__asm__ __volatile__ ("ldcr %0, %%cr0" : "=r" (pid));
+	__asm__ volatile ("ldcr %0, %%cr0" : "=r" (pid));
 	return (pid);
 }
 
diff --git a/sys/arch/m88k/include/atomic.h b/sys/arch/m88k/include/atomic.h
index d4b839e1a02..8dd3a9b73c7 100644
--- a/sys/arch/m88k/include/atomic.h
+++ b/sys/arch/m88k/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.9 2013/01/05 11:20:56 miod Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.10 2014/03/29 18:09:29 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -10,8 +10,8 @@
 #ifdef MULTIPROCESSOR
 
 /* actual implementation is hairy, see atomic.S */
-void	atomic_setbits_int(__volatile unsigned int *, unsigned int);
-void	atomic_clearbits_int(__volatile unsigned int *, unsigned int);
+void	atomic_setbits_int(volatile unsigned int *, unsigned int);
+void	atomic_clearbits_int(volatile unsigned int *, unsigned int);
 
 #else
 
@@ -19,7 +19,7 @@ void	atomic_clearbits_int(__volatile unsigned int *, unsigned int);
 #include <machine/psl.h>
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	u_int psr;
 
@@ -30,7 +30,7 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	u_int psr;
 
@@ -43,12 +43,12 @@ atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
 #endif	/* MULTIPROCESSOR */
 
 static __inline__ unsigned int
-atomic_clear_int(__volatile unsigned int *uip)
+atomic_clear_int(volatile unsigned int *uip)
 {
 	u_int oldval;
 
 	oldval = 0;
-	__asm__ __volatile__
+	__asm__ volatile
 	    ("xmem %0, %2, %%r0" : "+r"(oldval), "+m"(*uip) : "r"(uip));
 	return oldval;
 }
diff --git a/sys/arch/m88k/include/cpu.h b/sys/arch/m88k/include/cpu.h
index 9a68254a86f..fd31f548dc3 100644
--- a/sys/arch/m88k/include/cpu.h
+++ b/sys/arch/m88k/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.60 2013/05/31 17:00:58 tedu Exp $ */
+/*	$OpenBSD: cpu.h,v 1.61 2014/03/29 18:09:29 guenther Exp $ */
 /*
  * Copyright (c) 1996 Nivas Madhur
  * Copyright (c) 1992, 1993
@@ -192,7 +192,7 @@ curcpu(void)
 {
 	struct cpu_info *cpuptr;
 
-	__asm__ __volatile__ ("ldcr %0, %%cr17" : "=r" (cpuptr));
+	__asm__ volatile ("ldcr %0, %%cr17" : "=r" (cpuptr));
 	return cpuptr;
 }
 
diff --git a/sys/arch/m88k/include/lock.h b/sys/arch/m88k/include/lock.h
index dc2a40d1a8e..0ed61ca2860 100644
--- a/sys/arch/m88k/include/lock.h
+++ b/sys/arch/m88k/include/lock.h
@@ -1,6 +1,6 @@
 #ifndef	_M88K_LOCK_H_
 #define	_M88K_LOCK_H_
-/*	$OpenBSD: lock.h,v 1.8 2013/01/05 11:20:56 miod Exp $	*/
+/*	$OpenBSD: lock.h,v 1.9 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005, Miodrag Vallat.
@@ -51,7 +51,7 @@ __cpu_simple_lock_try(__cpu_simple_lock_t *l)
 	 */
 	u_int old = __SIMPLELOCK_LOCKED;
 
-	__asm__ __volatile__
+	__asm__ volatile
 	    ("xmem %0, %2, %%r0" : "+r"(old), "+m"(*l) : "r"(l));
 
 	return (old == __SIMPLELOCK_UNLOCKED);
diff --git a/sys/arch/m88k/include/mmu.h b/sys/arch/m88k/include/mmu.h
index 14cdb63a5e4..44b8e1de933 100644
--- a/sys/arch/m88k/include/mmu.h
+++ b/sys/arch/m88k/include/mmu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mmu.h,v 1.15 2013/11/16 18:45:20 miod Exp $ */
+/*	$OpenBSD: mmu.h,v 1.16 2014/03/29 18:09:29 guenther Exp $ */
 
 /*
  * This file bears almost no resemblance to the original m68k file,
@@ -187,7 +187,7 @@ invalidate_pte(pt_entry_t *pte)
 	pt_entry_t oldpte;
 
 	oldpte = PG_NV;
-	__asm__ __volatile__
+	__asm__ volatile
 	    ("xmem %0, %2, %%r0" : "+r"(oldpte), "+m"(*pte) : "r"(pte));
 	return oldpte;
 }
diff --git a/sys/arch/m88k/include/tcb.h b/sys/arch/m88k/include/tcb.h
index 10851b6fc08..b71544f6fe1 100644
--- a/sys/arch/m88k/include/tcb.h
+++ b/sys/arch/m88k/include/tcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tcb.h,v 1.2 2013/08/26 21:38:08 miod Exp $	*/
+/*	$OpenBSD: tcb.h,v 1.3 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
@@ -78,7 +78,7 @@ __m88k_read_tcb(size_t offset)
 }
 
 #define TCB_GET()	__m88k_get_tcb()
-#define TCB_SET(tcb)	__asm __volatile("or %%r27,%0,%r0" : : "r" (tcb))
+#define TCB_SET(tcb)	__asm volatile("or %%r27,%0,%r0" : : "r" (tcb))
 
 #define TCB_GET_MEMBER(member)	\
 	__m88k_read_tcb(offsetof(struct thread_control_block, member))
diff --git a/sys/arch/m88k/m88k/m88110_fp.c b/sys/arch/m88k/m88k/m88110_fp.c
index 328d20d4e57..ee04e7a1d9c 100644
--- a/sys/arch/m88k/m88k/m88110_fp.c
+++ b/sys/arch/m88k/m88k/m88110_fp.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88110_fp.c,v 1.8 2013/08/15 19:30:40 miod Exp $	*/
+/*	$OpenBSD: m88110_fp.c,v 1.9 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007, Miodrag Vallat.
@@ -137,10 +137,10 @@ m88110_fpu_exception(struct trapframe *frame)
 	 * exception registers. Do it now, and reset the exception
 	 * cause register.
 	 */
-	__asm__ __volatile__ ("fldcr %0, %%fcr0" : "=r"(frame->tf_fpecr));
-	__asm__ __volatile__ ("fldcr %0, %%fcr62" : "=r"(frame->tf_fpsr));
-	__asm__ __volatile__ ("fldcr %0, %%fcr63" : "=r"(frame->tf_fpcr));
-	__asm__ __volatile__ ("fstcr %r0, %fcr0");
+	__asm__ volatile ("fldcr %0, %%fcr0" : "=r"(frame->tf_fpecr));
+	__asm__ volatile ("fldcr %0, %%fcr62" : "=r"(frame->tf_fpsr));
+	__asm__ volatile ("fldcr %0, %%fcr63" : "=r"(frame->tf_fpcr));
+	__asm__ volatile ("fstcr %r0, %fcr0");
 
 	/*
 	 * Fetch the faulting instruction. This should not fail, if it
@@ -177,7 +177,7 @@ m88110_fpu_exception(struct trapframe *frame)
 		 * Update the floating point status register regardless of
 		 * whether we'll deliver a signal or not.
 		 */
-		__asm__ __volatile__ ("fstcr %0, %%fcr62" :: "r"(frame->tf_fpsr));
+		__asm__ volatile ("fstcr %0, %%fcr62" :: "r"(frame->tf_fpsr));
 		break;
 	default:
 		/*
diff --git a/sys/arch/m88k/m88k/m88k_machdep.c b/sys/arch/m88k/m88k/m88k_machdep.c
index 83d9127b10f..baa69f81ec7 100644
--- a/sys/arch/m88k/m88k/m88k_machdep.c
+++ b/sys/arch/m88k/m88k/m88k_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88k_machdep.c,v 1.58 2013/10/07 19:10:49 miod Exp $	*/
+/*	$OpenBSD: m88k_machdep.c,v 1.59 2014/03/29 18:09:29 guenther Exp $	*/
 /*
  * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -128,9 +128,9 @@ setregs(p, pack, stack, retval)
 	 * fcr62 and fcr63 in the pcb).  This is safe to do here since the
 	 * FPU is enabled and the kernel doesn't use it.
 	 */
-	__asm__ __volatile__ ("fstcr %r0, %fcr0");
-	__asm__ __volatile__ ("fstcr %r0, %fcr62");
-	__asm__ __volatile__ ("fstcr %r0, %fcr63");
+	__asm__ volatile ("fstcr %r0, %fcr0");
+	__asm__ volatile ("fstcr %r0, %fcr62");
+	__asm__ volatile ("fstcr %r0, %fcr63");
 
 	/*
 	 * The syscall will ``return'' to snip; set it.
@@ -318,7 +318,7 @@ set_cpu_number(cpuid_t number)
 #endif
 	ci->ci_cpuid = number;
 
-	__asm__ __volatile__ ("stcr %0, %%cr17" :: "r" (ci));
+	__asm__ volatile ("stcr %0, %%cr17" :: "r" (ci));
 	flush_pipeline();
 }
 
diff --git a/sys/arch/macppc/dev/smu.c b/sys/arch/macppc/dev/smu.c
index 1285278fe48..8b51078a653 100644
--- a/sys/arch/macppc/dev/smu.c
+++ b/sys/arch/macppc/dev/smu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: smu.c,v 1.23 2011/05/15 09:10:26 mpi Exp $	*/
+/*	$OpenBSD: smu.c,v 1.24 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Mark Kettenis
@@ -408,7 +408,7 @@ smu_do_cmd(struct smu_softc *sc, int timo)
 	    sc->sc_cmdmap->dm_segs->ds_addr);
 
 	/* Flush to RAM. */
-	asm __volatile__ ("dcbst 0,%0; sync" :: "r"(sc->sc_cmd): "memory");
+	asm volatile ("dcbst 0,%0; sync" :: "r"(sc->sc_cmd): "memory");
 
 	/* Ring doorbell.  */
 	bus_space_write_1(sc->sc_memt, sc->sc_gpioh, 0, GPIO_DDR_OUTPUT);
@@ -421,7 +421,7 @@ smu_do_cmd(struct smu_softc *sc, int timo)
 	} while (!(gpio & (GPIO_DATA)));
 
 	/* CPU might have brought back the cache line. */
-	asm __volatile__ ("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory");
+	asm volatile ("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory");
 
 	if (cmd->cmd != ack)
 		return (EIO);
diff --git a/sys/arch/macppc/dev/zs.c b/sys/arch/macppc/dev/zs.c
index 2f0c0d07ccd..f49efcdf730 100644
--- a/sys/arch/macppc/dev/zs.c
+++ b/sys/arch/macppc/dev/zs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: zs.c,v 1.22 2013/10/21 08:25:42 miod Exp $	*/
+/*	$OpenBSD: zs.c,v 1.23 2014/03/29 18:09:29 guenther Exp $	*/
 /*	$NetBSD: zs.c,v 1.17 2001/06/19 13:42:15 wiz Exp $	*/
 
 /*
@@ -517,7 +517,7 @@ zs_dma_setup(cs, pa, len)
 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
 
-	__asm __volatile("eieio");
+	__asm volatile("eieio");
 
 	dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
 }
diff --git a/sys/arch/macppc/include/bus.h b/sys/arch/macppc/include/bus.h
index 4eeec12c5f6..4f414256dd4 100644
--- a/sys/arch/macppc/include/bus.h
+++ b/sys/arch/macppc/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.22 2012/12/06 12:35:22 mpi Exp $	*/
+/*	$OpenBSD: bus.h,v 1.23 2014/03/29 18:09:29 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997 Per Fogelstrom.  All rights reserved.
@@ -170,7 +170,7 @@ bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*addr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -180,9 +180,9 @@ bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int16_t *s = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("lhbrx %0, 0, %1" :
+		__asm volatile("lhbrx %0, 0, %1" :
 			"=r"(*addr++) : "r"(s++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -192,9 +192,9 @@ bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int32_t *s = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("lwbrx %0, 0, %1" :
+		__asm volatile("lwbrx %0, 0, %1" :
 			"=r"(*addr++) : "r"(s++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0	/* Cause a link error for bus_space_read_region_8 */
@@ -219,7 +219,7 @@ bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *addr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -229,9 +229,9 @@ bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int16_t *d = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("sthbrx %0, 0, %1" ::
+		__asm volatile("sthbrx %0, 0, %1" ::
 			"r"(*addr++), "r"(d++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -241,9 +241,9 @@ bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int32_t *d = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("stwbrx %0, 0, %1" ::
+		__asm volatile("stwbrx %0, 0, %1" ::
 			"r"(*addr++), "r"(d++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0
@@ -270,7 +270,7 @@ bus_space_read_raw_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*laddr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -284,7 +284,7 @@ bus_space_read_raw_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*laddr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0	/* Cause a link error for bus_space_read_raw_region_8 */
@@ -313,7 +313,7 @@ bus_space_write_raw_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *laddr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -327,7 +327,7 @@ bus_space_write_raw_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *laddr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0
diff --git a/sys/arch/macppc/macppc/lock_machdep.c b/sys/arch/macppc/macppc/lock_machdep.c
index 2451f0bfe32..b59004e7fc8 100644
--- a/sys/arch/macppc/macppc/lock_machdep.c
+++ b/sys/arch/macppc/macppc/lock_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock_machdep.c,v 1.2 2013/12/05 01:28:45 uebayasi Exp $	*/
+/*	$OpenBSD: lock_machdep.c,v 1.3 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -84,7 +84,7 @@ __mp_lock(struct __mp_lock *mpl)
 
 		s = ppc_intr_disable();
 		if (__cpu_cas(&mpl->mpl_count, 0, 1) == 0) {
-			__asm __volatile("eieio" ::: "memory");
+			__asm volatile("eieio" ::: "memory");
 			mpl->mpl_cpu = curcpu();
 		}
 
@@ -114,7 +114,7 @@ __mp_unlock(struct __mp_lock *mpl)
 	s = ppc_intr_disable();
 	if (--mpl->mpl_count == 1) {
 		mpl->mpl_cpu = NULL;
-		__asm __volatile("eieio" ::: "memory");
+		__asm volatile("eieio" ::: "memory");
 		mpl->mpl_count = 0;
 	}
 	ppc_intr_enable(s);
@@ -135,7 +135,7 @@ __mp_release_all(struct __mp_lock *mpl)
 
 	s = ppc_intr_disable();
 	mpl->mpl_cpu = NULL;
-	__asm __volatile("eieio" ::: "memory");
+	__asm volatile("eieio" ::: "memory");
 	mpl->mpl_count = 0;
 	ppc_intr_enable(s);
 
diff --git a/sys/arch/macppc/pci/agp_machdep.c b/sys/arch/macppc/pci/agp_machdep.c
index 17b60e12b99..cfe81cda9c2 100644
--- a/sys/arch/macppc/pci/agp_machdep.c
+++ b/sys/arch/macppc/pci/agp_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: agp_machdep.c,v 1.2 2014/03/26 14:41:41 mpi Exp $	*/
+/*	$OpenBSD: agp_machdep.c,v 1.3 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Martin Pieuchot <mpi@openbsd.org>
@@ -26,5 +26,5 @@
 void
 agp_flush_cache(void)
 {
-	__asm __volatile("sync" : : : "memory");
+	__asm volatile("sync" : : : "memory");
 }
diff --git a/sys/arch/mips64/include/atomic.h b/sys/arch/mips64/include/atomic.h
index 467a2ada83a..6c8a4abbf72 100644
--- a/sys/arch/mips64/include/atomic.h
+++ b/sys/arch/mips64/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.7 2011/03/23 16:54:36 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.8 2014/03/29 18:09:30 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -9,11 +9,11 @@
 
 /* wait until the bits to set are clear, and set them */
 static __inline void
-atomic_wait_and_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_wait_and_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp0, tmp1;
 
-	__asm__ __volatile__ (
+	__asm__ volatile (
 	"1:	ll	%0,	0(%2)\n"
 	"	and	%1,	%0,	%3\n"
 	"	bnez	%1,	1b\n"
@@ -26,11 +26,11 @@ atomic_wait_and_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp;
 
-	__asm__ __volatile__ (
+	__asm__ volatile (
 	"1:	ll	%0,	0(%1)\n"
 	"	or	%0,	%2,	%0\n"
 	"	sc	%0,	0(%1)\n"
@@ -41,11 +41,11 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp;
 
-	__asm__ __volatile__ (
+	__asm__ volatile (
 	"1:	ll	%0,	0(%1)\n"
 	"	and	%0,	%2,	%0\n"
 	"	sc	%0,	0(%1)\n"
@@ -56,11 +56,11 @@ atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_add_int(__volatile unsigned int *uip, unsigned int v)
+atomic_add_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp;
 
-	__asm__ __volatile__ (
+	__asm__ volatile (
 	"1:	ll	%0,	0(%1)\n"
 	"	addu	%0,	%2,	%0\n"
 	"	sc	%0,	0(%1)\n"
@@ -70,11 +70,11 @@ atomic_add_int(__volatile unsigned int *uip, unsigned int v)
 		"r"(uip), "r"(v) : "memory");
 }
 static __inline void
-atomic_add_uint64(__volatile uint64_t *uip, uint64_t v)
+atomic_add_uint64(volatile uint64_t *uip, uint64_t v)
 {
 	uint64_t tmp;
 
-	__asm__ __volatile__ (
+	__asm__ volatile (
 	"1:	lld	%0,	0(%1)\n"
 	"	daddu	%0,	%2,	%0\n"
 	"	scd	%0,	0(%1)\n"
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index 4ce540bc839..8ec1e653c2a 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.98 2014/03/22 00:01:04 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.99 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -310,10 +310,10 @@ void	cp0_calibrate(struct cpu_info *);
 #define	aston(p)		p->p_md.md_astpending = 1
 
 #ifdef CPU_R8000
-#define	mips_sync()		__asm__ __volatile__ ("lw $0, 0(%0)" :: \
+#define	mips_sync()		__asm__ volatile ("lw $0, 0(%0)" :: \
 				    "r" (PHYS_TO_XKPHYS(0, CCA_NC)) : "memory")
 #else
-#define	mips_sync()		__asm__ __volatile__ ("sync" ::: "memory")
+#define	mips_sync()		__asm__ volatile ("sync" ::: "memory")
 #endif
 
 #endif /* _KERNEL && !_LOCORE */
diff --git a/sys/arch/mips64/mips64/arcbios.c b/sys/arch/mips64/mips64/arcbios.c
index 5b2a43e2ac1..3c9ce2157bd 100644
--- a/sys/arch/mips64/mips64/arcbios.c
+++ b/sys/arch/mips64/mips64/arcbios.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: arcbios.c,v 1.34 2014/02/08 22:13:45 miod Exp $	*/
+/*	$OpenBSD: arcbios.c,v 1.35 2014/03/29 18:09:30 guenther Exp $	*/
 /*-
  * Copyright (c) 1996 M. Warner Losh.  All rights reserved.
  * Copyright (c) 1996-2004 Opsycon AB.  All rights reserved.
@@ -456,7 +456,7 @@ bios_get_system_type()
 	 * register has bits sets in the upper 32 bits, which is not the
 	 * case of the R8000 PrId register).
 	 */
-	__asm__ __volatile__ ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
+	__asm__ volatile ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
 	if ((prid & 0xff00) == (MIPS_R8000 << 8))
 		bios_base = (void *)PHYS_TO_XKPHYS(ARCBIOS_BASE, CCA_CACHED);
 	else
diff --git a/sys/arch/mips64/mips64/cache_loongson2.c b/sys/arch/mips64/mips64/cache_loongson2.c
index 892ffb22645..2b5ea321998 100644
--- a/sys/arch/mips64/mips64/cache_loongson2.c
+++ b/sys/arch/mips64/mips64/cache_loongson2.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_loongson2.c,v 1.4 2014/03/09 10:12:17 miod Exp $	*/
+/*	$OpenBSD: cache_loongson2.c,v 1.5 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2009, 2012 Miodrag Vallat.
@@ -55,7 +55,7 @@
 #define	IndexStoreData_S	0x1f
 
 #define	cache(op,set,addr) \
-    __asm__ __volatile__ \
+    __asm__ volatile \
       ("cache %0, %1(%2)" :: "i"(op), "i"(set), "r"(addr) : "memory")
 
 static __inline__ void	ls2f_hitinv_primary(vaddr_t, vsize_t);
diff --git a/sys/arch/mips64/mips64/cache_r10k.c b/sys/arch/mips64/mips64/cache_r10k.c
index acede0b5d0d..90063247204 100644
--- a/sys/arch/mips64/mips64/cache_r10k.c
+++ b/sys/arch/mips64/mips64/cache_r10k.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_r10k.c,v 1.4 2014/03/09 10:12:17 miod Exp $	*/
+/*	$OpenBSD: cache_r10k.c,v 1.5 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -47,7 +47,7 @@
 #define	HitWBInvalidate_S	0x17
 
 #define	cache(op,set,addr) \
-    __asm__ __volatile__ \
+    __asm__ volatile \
       ("cache %0, %1(%2)" :: "i"(op), "i"(set), "r"(addr) : "memory")
 
 static __inline__ void	mips10k_hitinv_primary(vaddr_t, vsize_t);
diff --git a/sys/arch/mips64/mips64/cache_r4k.c b/sys/arch/mips64/mips64/cache_r4k.c
index 21370e1508c..a2094498ae7 100644
--- a/sys/arch/mips64/mips64/cache_r4k.c
+++ b/sys/arch/mips64/mips64/cache_r4k.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_r4k.c,v 1.12 2014/03/09 10:12:17 miod Exp $	*/
+/*	$OpenBSD: cache_r4k.c,v 1.13 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -36,7 +36,7 @@
 #define	HitWBInvalidate_S	0x17
 
 #define	cache(op,addr) \
-    __asm__ __volatile__ ("cache %0, 0(%1)" :: "i"(op), "r"(addr) : "memory")
+    __asm__ volatile ("cache %0, 0(%1)" :: "i"(op), "r"(addr) : "memory")
 
 static __inline__ void	mips4k_hitinv_primary(vaddr_t, vsize_t, vsize_t);
 static __inline__ void	mips4k_hitinv_secondary(vaddr_t, vsize_t, vsize_t);
diff --git a/sys/arch/mips64/mips64/cache_r5k.c b/sys/arch/mips64/mips64/cache_r5k.c
index fb164d00468..87cb2dc7568 100644
--- a/sys/arch/mips64/mips64/cache_r5k.c
+++ b/sys/arch/mips64/mips64/cache_r5k.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_r5k.c,v 1.11 2014/03/11 20:32:42 miod Exp $	*/
+/*	$OpenBSD: cache_r5k.c,v 1.12 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -108,31 +108,31 @@
 #define	CTYPE_HAS_XL2		0x02	/* External L2 Cache present */
 #define	CTYPE_HAS_XL3		0x04	/* External L3 Cache present */
 
-#define	nop4()			__asm__ __volatile__ \
+#define	nop4()			__asm__ volatile \
 	("nop; nop; nop; nop")
-#define	nop10()			__asm__ __volatile__ \
+#define	nop10()			__asm__ volatile \
 	("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop")
 
-#define	cache(op,offs,addr)	__asm__ __volatile__ \
+#define	cache(op,offs,addr)	__asm__ volatile \
 	("cache %0, %1(%2)" :: "i"(op), "i"(offs), "r"(addr) : "memory")
 
-#define	reset_taglo()		__asm__ __volatile__ \
+#define	reset_taglo()		__asm__ volatile \
 	("mtc0 $zero, $28")	/* COP_0_TAG_LO */
-#define	reset_taghi()		__asm__ __volatile__ \
+#define	reset_taghi()		__asm__ volatile \
 	("mtc0 $zero, $29")	/* COP_0_TAG_HI */
 
 static __inline__ register_t
 get_config(void)
 {
 	register_t cfg;
-	__asm__ __volatile__ ("mfc0 %0, $16" : "=r"(cfg)); /* COP_0_CONFIG */
+	__asm__ volatile ("mfc0 %0, $16" : "=r"(cfg)); /* COP_0_CONFIG */
 	return cfg;
 }
 
 static __inline__ void
 set_config(register_t cfg)
 {
-	__asm__ __volatile__ ("mtc0 %0, $16" :: "r"(cfg)); /* COP_0_CONFIG */
+	__asm__ volatile ("mtc0 %0, $16" :: "r"(cfg)); /* COP_0_CONFIG */
 	/* MTC0_HAZARD */
 #ifdef CPU_RM7000
 	nop10();
@@ -232,7 +232,7 @@ mips7k_l2_init(register_t l2size)
 	va = PHYS_TO_XKPHYS(0, CCA_CACHED);
 	eva = va + l2size;
 	while (va != eva) {
-		__asm__ __volatile__
+		__asm__ volatile
 		    ("lw $zero, 0(%0)" :: "r"(va));
 		va += R5K_LINE;
 	}
diff --git a/sys/arch/mips64/mips64/fp_emulate.c b/sys/arch/mips64/mips64/fp_emulate.c
index 1b4a48a806d..4da52d19570 100644
--- a/sys/arch/mips64/mips64/fp_emulate.c
+++ b/sys/arch/mips64/mips64/fp_emulate.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fp_emulate.c,v 1.8 2012/10/03 11:18:23 miod Exp $	*/
+/*	$OpenBSD: fp_emulate.c,v 1.9 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2010 Miodrag Vallat.
@@ -148,8 +148,8 @@ MipsFPTrap(struct trap_frame *tf)
 	sr = getsr();
 	setsr(sr | SR_COP_1_BIT);
 
-	__asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fsr));
-	__asm__ __volatile__ ("cfc1 %0, $31" : "=r" (fsr));
+	__asm__ volatile ("cfc1 %0, $31" : "=r" (fsr));
+	__asm__ volatile ("cfc1 %0, $31" : "=r" (fsr));
 
 	/*
 	 * If this is not an unimplemented operation, but a genuine
@@ -380,7 +380,7 @@ deliver:
 	if (update_pcb)
 		tf->fsr = fsr;
 #ifndef FPUEMUL
-	__asm__ __volatile__ ("ctc1 %0, $31" :: "r" (fsr));
+	__asm__ volatile ("ctc1 %0, $31" :: "r" (fsr));
 	/* disable fpu before returning to trap() */
 	setsr(sr);
 #endif
diff --git a/sys/arch/octeon/dev/cn30xxpow.c b/sys/arch/octeon/dev/cn30xxpow.c
index f49803e7ca5..f5d3fd10baa 100644
--- a/sys/arch/octeon/dev/cn30xxpow.c
+++ b/sys/arch/octeon/dev/cn30xxpow.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cn30xxpow.c,v 1.3 2013/06/01 22:20:35 jasper Exp $	*/
+/*	$OpenBSD: cn30xxpow.c,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -262,7 +262,7 @@ cn30xxpow_tag_sw_poll(void)
 {
 	uint64_t result;
 
-	__asm __volatile (
+	__asm volatile (
 		"	.set	push		\n"
 		"	.set	noreorder	\n"
 		"	.set	arch=mips64r2	\n"
diff --git a/sys/arch/octeon/include/bus.h b/sys/arch/octeon/include/bus.h
index ceacab49c62..efe398f5da9 100644
--- a/sys/arch/octeon/include/bus.h
+++ b/sys/arch/octeon/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.5 2014/03/10 21:32:15 miod Exp $	*/
+/*	$OpenBSD: bus.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB Sweden.  All rights reserved.
@@ -298,7 +298,7 @@ static inline void
 bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
     bus_size_t length, int flags)
 {
-	__asm__ __volatile__ ("sync" ::: "memory");
+	__asm__ volatile ("sync" ::: "memory");
 }
 #define BUS_SPACE_BARRIER_READ  0x01		/* force read barrier */
 #define BUS_SPACE_BARRIER_WRITE 0x02		/* force write barrier */
diff --git a/sys/arch/octeon/include/octeonvar.h b/sys/arch/octeon/include/octeonvar.h
index 4b0bf100bc4..2441d3fea24 100644
--- a/sys/arch/octeon/include/octeonvar.h
+++ b/sys/arch/octeon/include/octeonvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: octeonvar.h,v 1.15 2013/11/04 17:51:03 bcallah Exp $	*/
+/*	$OpenBSD: octeonvar.h,v 1.16 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: maltavar.h,v 1.3 2002/03/18 10:10:16 simonb Exp $	*/
 
 /*-
@@ -297,7 +297,7 @@ ffs64(uint64_t val)
 {
 	int ret;
 
-	__asm __volatile ( \
+	__asm volatile ( \
 		_ASM_PROLOGUE_MIPS64
 		"	dclz	%0, %1			\n"
 		_ASM_EPILOGUE
@@ -367,7 +367,7 @@ octeon_disable_interrupt(uint32_t *new)
 {
 	uint32_t s, tmp;
 
-	__asm __volatile (
+	__asm volatile (
 		_ASM_PROLOGUE
 		"	mfc0	%[s], $12		\n"
 		"	and	%[tmp], %[s], ~1	\n"
@@ -383,7 +383,7 @@ octeon_disable_interrupt(uint32_t *new)
 static inline void
 octeon_restore_status(uint32_t s)
 {
-	__asm __volatile (
+	__asm volatile (
 		_ASM_PROLOGUE
 		"	mtc0	%[s], $12		\n"
 		_ASM_EPILOGUE
@@ -395,7 +395,7 @@ octeon_get_cycles(void)
 {
 	uint64_t tmp;
 
-	__asm __volatile (
+	__asm volatile (
 		_ASM_PROLOGUE_MIPS64
 		"	dmfc0	%[tmp], $9, 6		\n"
 		_ASM_EPILOGUE
diff --git a/sys/arch/powerpc/include/atomic.h b/sys/arch/powerpc/include/atomic.h
index 1cc9e487300..77a24d4a84d 100644
--- a/sys/arch/powerpc/include/atomic.h
+++ b/sys/arch/powerpc/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.5 2013/08/06 08:19:52 kettenis Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -8,7 +8,7 @@
 #if defined(_KERNEL)
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp;
 
@@ -21,7 +21,7 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int tmp;
 
diff --git a/sys/arch/powerpc/include/cpu.h b/sys/arch/powerpc/include/cpu.h
index 3f47bdc7953..fdf0c48878b 100644
--- a/sys/arch/powerpc/include/cpu.h
+++ b/sys/arch/powerpc/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.51 2013/03/12 09:37:16 mpi Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.52 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $	*/
 
 /*
@@ -192,17 +192,17 @@ syncicache(void *from, int len)
 	l = len;
 
 	do {
-		__asm __volatile ("dcbst 0,%0" :: "r"(p));
+		__asm volatile ("dcbst 0,%0" :: "r"(p));
 		p += CACHELINESIZE;
 	} while ((l -= CACHELINESIZE) > 0);
-	__asm __volatile ("sync");
+	__asm volatile ("sync");
 	p = from;
 	l = len;
 	do {
-		__asm __volatile ("icbi 0,%0" :: "r"(p));
+		__asm volatile ("icbi 0,%0" :: "r"(p));
 		p += CACHELINESIZE;
 	} while ((l -= CACHELINESIZE) > 0);
-	__asm __volatile ("isync");
+	__asm volatile ("isync");
 }
 
 static __inline void
@@ -215,22 +215,22 @@ invdcache(void *from, int len)
 	l = len;
 
 	do {
-		__asm __volatile ("dcbi 0,%0" :: "r"(p));
+		__asm volatile ("dcbi 0,%0" :: "r"(p));
 		p += CACHELINESIZE;
 	} while ((l -= CACHELINESIZE) > 0);
-	__asm __volatile ("sync");
+	__asm volatile ("sync");
 }
 
 #define FUNC_SPR(n, name) \
 static __inline u_int32_t ppc_mf ## name (void)			\
 {								\
 	u_int32_t ret;						\
-	__asm __volatile ("mfspr %0," # n : "=r" (ret));	\
+	__asm volatile ("mfspr %0," # n : "=r" (ret));		\
 	return ret;						\
 }								\
 static __inline void ppc_mt ## name (u_int32_t val)		\
 {								\
-	__asm __volatile ("mtspr "# n ",%0" :: "r" (val));	\
+	__asm volatile ("mtspr "# n ",%0" :: "r" (val));	\
 }								\
 
 FUNC_SPR(0, mq)
@@ -297,7 +297,7 @@ static __inline u_int32_t
 ppc_mftbl (void)
 {
 	int ret;
-	__asm __volatile ("mftb %0" : "=r" (ret));
+	__asm volatile ("mftb %0" : "=r" (ret));
 	return ret;
 }
 
@@ -307,7 +307,7 @@ ppc_mftb(void)
 	u_long scratch;
 	u_int64_t tb;
 
-	__asm __volatile ("1: mftbu %0; mftb %0+1; mftbu %1;"
+	__asm volatile ("1: mftbu %0; mftb %0+1; mftbu %1;"
 	    " cmpw 0,%0,%1; bne 1b" : "=r"(tb), "=r"(scratch));
 	return tb;
 }
@@ -316,20 +316,20 @@ static __inline u_int32_t
 ppc_mfmsr (void)
 {
 	int ret;
-        __asm __volatile ("mfmsr %0" : "=r" (ret));
+        __asm volatile ("mfmsr %0" : "=r" (ret));
 	return ret;
 }
 
 static __inline void
 ppc_mtmsr (u_int32_t val)
 {
-        __asm __volatile ("mtmsr %0" :: "r" (val));
+        __asm volatile ("mtmsr %0" :: "r" (val));
 }
 
 static __inline void
 ppc_mtsrin(u_int32_t val, u_int32_t sn_shifted)
 {
-	__asm __volatile ("mtsrin %0,%1" :: "r"(val), "r"(sn_shifted));
+	__asm volatile ("mtsrin %0,%1" :: "r"(val), "r"(sn_shifted));
 }
 
 u_int64_t ppc64_mfscomc(void);
diff --git a/sys/arch/powerpc/include/mutex.h b/sys/arch/powerpc/include/mutex.h
index cffc66fab44..6dec10b9b6b 100644
--- a/sys/arch/powerpc/include/mutex.h
+++ b/sys/arch/powerpc/include/mutex.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.h,v 1.3 2014/01/22 11:01:15 kettenis Exp $	*/
+/*	$OpenBSD: mutex.h,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -30,7 +30,7 @@
 struct mutex {
 	int mtx_wantipl;
 	int mtx_oldcpl;
-	__volatile void *mtx_owner;
+	volatile void *mtx_owner;
 };
 
 /*
diff --git a/sys/arch/powerpc/include/proc.h b/sys/arch/powerpc/include/proc.h
index 341f2699d18..e81207c9a24 100644
--- a/sys/arch/powerpc/include/proc.h
+++ b/sys/arch/powerpc/include/proc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: proc.h,v 1.6 2011/11/09 15:35:01 kettenis Exp $	*/
+/*	$OpenBSD: proc.h,v 1.7 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: proc.h,v 1.1 1996/09/30 16:34:31 ws Exp $	*/
 
 /*-
@@ -39,7 +39,7 @@
  * Machine-dependent part of the proc structure
  */
 struct mdproc {
-	__volatile int md_astpending;
+	volatile int md_astpending;
 };
 
 #define __HAVE_MD_TCB
diff --git a/sys/arch/powerpc/include/tcb.h b/sys/arch/powerpc/include/tcb.h
index 6538afcfae3..c0aa2967e47 100644
--- a/sys/arch/powerpc/include/tcb.h
+++ b/sys/arch/powerpc/include/tcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tcb.h,v 1.2 2011/11/09 15:35:01 kettenis Exp $	*/
+/*	$OpenBSD: tcb.h,v 1.3 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
@@ -63,7 +63,7 @@ __powerpc_read_tcb(int offset)
 #define TCB_GET_MEMBER(member) \
 	__powerpc_read_tcb(offsetof(struct thread_control_block, member))
 
-#define TCB_SET(tcb)	__asm __volatile("mr %%r2, %0" : : "r" (tcb))
+#define TCB_SET(tcb)	__asm volatile("mr %%r2, %0" : : "r" (tcb))
 
 #endif /* 0 */
 
diff --git a/sys/arch/powerpc/powerpc/cpu_subr.c b/sys/arch/powerpc/powerpc/cpu_subr.c
index 98d1c0478e9..5bee4984374 100644
--- a/sys/arch/powerpc/powerpc/cpu_subr.c
+++ b/sys/arch/powerpc/powerpc/cpu_subr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu_subr.c,v 1.2 2005/11/26 22:40:31 kettenis Exp $	*/
+/*	$OpenBSD: cpu_subr.c,v 1.3 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2005 Mark Kettenis
@@ -26,7 +26,7 @@ ppc_mtscomc(u_int32_t val)
 	int s;
 
 	s = ppc_intr_disable();
-	__asm __volatile ("mtspr 276,%0; isync" :: "r" (val));
+	__asm volatile ("mtspr 276,%0; isync" :: "r" (val));
 	ppc_intr_enable(s);
 }
 
@@ -36,7 +36,7 @@ ppc_mtscomd(u_int32_t val)
 	int s;
 
 	s = ppc_intr_disable();
-	__asm __volatile ("mtspr 277,%0; isync" :: "r" (val));
+	__asm volatile ("mtspr 277,%0; isync" :: "r" (val));
 	ppc_intr_enable(s);
 }
 
@@ -47,7 +47,7 @@ ppc64_mfscomc(void)
 	int s;
 
 	s = ppc_intr_disable();
-	__asm __volatile ("mfspr %0,276;"
+	__asm volatile ("mfspr %0,276;"
 	    " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
 	ppc_intr_enable(s);
 	return ret;
@@ -59,7 +59,7 @@ ppc64_mtscomc(u_int64_t val)
 	int s;
 
 	s = ppc_intr_disable();
-	__asm __volatile ("sldi %0,%0,32; or %0,%0,%0+1;"
+	__asm volatile ("sldi %0,%0,32; or %0,%0,%0+1;"
 	    " mtspr 276,%0; isync" :: "r" (val));
 	ppc_intr_enable(s);
 }
@@ -71,7 +71,7 @@ ppc64_mfscomd(void)
 	int s;
 
 	s = ppc_intr_disable();
-	__asm __volatile ("mfspr %0,277;"
+	__asm volatile ("mfspr %0,277;"
             " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
 	ppc_intr_enable(s);
 	return ret;
diff --git a/sys/arch/powerpc/powerpc/in_cksum.c b/sys/arch/powerpc/powerpc/in_cksum.c
index 0677f725882..27e918e6773 100644
--- a/sys/arch/powerpc/powerpc/in_cksum.c
+++ b/sys/arch/powerpc/powerpc/in_cksum.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: in_cksum.c,v 1.8 2008/05/15 22:17:08 brad Exp $	*/
+/*	$OpenBSD: in_cksum.c,v 1.9 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: in_cksum.c,v 1.7 2003/07/15 02:54:48 lukem Exp $	*/
 
 /*
@@ -118,7 +118,7 @@ in_cksum_internal(struct mbuf *m, int off, int len, u_int sum)
 				 * Since the `sum' may contain full 32 bit
 				 * value, we can't simply add any value.
 				 */
-				__asm __volatile(
+				__asm volatile(
 				    "lhz 7,0(%1);"	/* load current data
 							   half word */
 				    "addc %0,%0,7;"	/* add to sum */
@@ -133,7 +133,7 @@ in_cksum_internal(struct mbuf *m, int off, int len, u_int sum)
 
 		if (mlen >= 64) {
 			n = mlen >> 6;
-			__asm __volatile(
+			__asm volatile(
 			    "addic 0,0,0;"		/* clear carry */
 			    "mtctr %1;"			/* load loop count */
 			    "1:"
@@ -182,7 +182,7 @@ in_cksum_internal(struct mbuf *m, int off, int len, u_int sum)
 
 		if (mlen >= 8) {
 			n = mlen >> 3;
-			__asm __volatile(
+			__asm volatile(
 			    "addic 0,0,0;"		/* clear carry */
 			    "mtctr %1;"			/* load loop count */
 			    "1:"
diff --git a/sys/arch/sgi/localbus/tcc.c b/sys/arch/sgi/localbus/tcc.c
index 0e6ff894cb8..63d84dbb106 100644
--- a/sys/arch/sgi/localbus/tcc.c
+++ b/sys/arch/sgi/localbus/tcc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tcc.c,v 1.3 2014/03/09 10:12:17 miod Exp $	*/
+/*	$OpenBSD: tcc.c,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -130,10 +130,10 @@ tcc_bus_error(uint32_t hwpend, struct trap_frame *tf)
  */
 
 #define	tcc_cache_hit(addr,op) \
-__asm__ __volatile__ ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_HIT), \
+__asm__ volatile ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_HIT), \
     "r" (PHYS_TO_XKPHYS(TCC_CACHEOP_BASE | (addr) | (op), CCA_NC)) : "memory")
 #define	tcc_cache_index(s,i,op) \
-__asm__ __volatile__ ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_INDEX | (op)), \
+__asm__ volatile ("lw $0, %0(%1)" :: "i" (TCC_CACHEOP_INDEX | (op)), \
     "r" (PHYS_TO_XKPHYS(TCC_CACHEOP_BASE | ((s) << TCC_CACHEOP_SET_SHIFT) | \
 	 ((i) << TCC_CACHEOP_INDEX_SHIFT), CCA_NC)) : "memory")
 
diff --git a/sys/arch/sgi/stand/boot/arcbios.c b/sys/arch/sgi/stand/boot/arcbios.c
index c254be76f62..e4196d7aff3 100644
--- a/sys/arch/sgi/stand/boot/arcbios.c
+++ b/sys/arch/sgi/stand/boot/arcbios.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: arcbios.c,v 1.19 2012/10/18 16:54:35 miod Exp $	*/
+/*	$OpenBSD: arcbios.c,v 1.20 2014/03/29 18:09:30 guenther Exp $	*/
 /*-
  * Copyright (c) 1996 M. Warner Losh.  All rights reserved.
  * Copyright (c) 1996-2004 Opsycon AB.  All rights reserved.
@@ -219,7 +219,7 @@ arcbios_init()
 	 * case of the R8000 PrId register).
 	 */
 #ifdef __LP64__
-	__asm__ __volatile__ ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
+	__asm__ volatile ("mfc0 %0, $15" /* COP_0_PRID */ : "=r" (prid));
 	if ((prid & 0xff00) == (MIPS_R8000 << 8))
 		bios_base = (void *)PHYS_TO_XKPHYS(ARCBIOS_BASE, CCA_CACHED);
 	else
diff --git a/sys/arch/sh/include/atomic.h b/sys/arch/sh/include/atomic.h
index 09a4d13779e..1fee1e40b04 100644
--- a/sys/arch/sh/include/atomic.h
+++ b/sys/arch/sh/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.4 2011/03/23 16:54:36 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.5 2014/03/29 18:09:30 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -10,25 +10,25 @@
 #include <sh/psl.h>
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int sr;
 
-	__asm__ __volatile__ ("stc sr, %0" : "=r"(sr));
-	__asm__ __volatile__ ("ldc %0, sr" : : "r"(sr | PSL_IMASK));
+	__asm__ volatile ("stc sr, %0" : "=r"(sr));
+	__asm__ volatile ("ldc %0, sr" : : "r"(sr | PSL_IMASK));
 	*uip |= v;
-	__asm__ __volatile__ ("ldc %0, sr" : : "r"(sr));
+	__asm__ volatile ("ldc %0, sr" : : "r"(sr));
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	unsigned int sr;
 
-	__asm__ __volatile__ ("stc sr, %0" : "=r"(sr));
-	__asm__ __volatile__ ("ldc %0, sr" : : "r"(sr | PSL_IMASK));
+	__asm__ volatile ("stc sr, %0" : "=r"(sr));
+	__asm__ volatile ("ldc %0, sr" : : "r"(sr | PSL_IMASK));
 	*uip &= ~v;
-	__asm__ __volatile__ ("ldc %0, sr" : : "r"(sr));
+	__asm__ volatile ("ldc %0, sr" : : "r"(sr));
 }
 
 #endif /* defined(_KERNEL) */
diff --git a/sys/arch/sh/sh/trap.c b/sys/arch/sh/sh/trap.c
index da2be62bb9c..eeb4f4bea8e 100644
--- a/sys/arch/sh/sh/trap.c
+++ b/sys/arch/sh/sh/trap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: trap.c,v 1.22 2014/03/26 05:23:42 guenther Exp $	*/
+/*	$OpenBSD: trap.c,v 1.23 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: exception.c,v 1.32 2006/09/04 23:57:52 uwe Exp $	*/
 /*	$NetBSD: syscall.c,v 1.6 2006/03/07 07:21:50 thorpej Exp $	*/
 
@@ -257,7 +257,7 @@ general_exception(struct proc *p, struct trapframe *tf, uint32_t va)
 		int fpscr, sigi;
 
 		/* XXX worth putting in the trapframe? */
-		__asm__ __volatile__ ("sts fpscr, %0" : "=r" (fpscr));
+		__asm__ volatile ("sts fpscr, %0" : "=r" (fpscr));
 		fpscr = (fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
 		if (fpscr & FPEXC_E)
 			sigi = FPE_FLTINV;	/* XXX any better value? */
diff --git a/sys/arch/socppc/include/bus.h b/sys/arch/socppc/include/bus.h
index 26819d53749..839f18e6cd4 100644
--- a/sys/arch/socppc/include/bus.h
+++ b/sys/arch/socppc/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.8 2012/08/24 10:05:25 jsg Exp $	*/
+/*	$OpenBSD: bus.h,v 1.9 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 1997 Per Fogelstrom.  All rights reserved.
@@ -161,7 +161,7 @@ bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*addr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -171,9 +171,9 @@ bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int16_t *s = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("lhbrx %0, 0, %1" :
+		__asm volatile("lhbrx %0, 0, %1" :
 			"=r"(*addr++) : "r"(s++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -183,9 +183,9 @@ bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int32_t *s = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("lwbrx %0, 0, %1" :
+		__asm volatile("lwbrx %0, 0, %1" :
 			"=r"(*addr++) : "r"(s++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0	/* Cause a link error for bus_space_read_region_8 */
@@ -210,7 +210,7 @@ bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *addr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -220,9 +220,9 @@ bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int16_t *d = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("sthbrx %0, 0, %1" ::
+		__asm volatile("sthbrx %0, 0, %1" ::
 			"r"(*addr++), "r"(d++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -232,9 +232,9 @@ bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 	volatile u_int32_t *d = __BA(tag, bsh, offset);
 
 	while (count--)
-		__asm __volatile("stwbrx %0, 0, %1" ::
+		__asm volatile("stwbrx %0, 0, %1" ::
 			"r"(*addr++), "r"(d++));
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0
@@ -261,7 +261,7 @@ bus_space_read_raw_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*laddr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -275,7 +275,7 @@ bus_space_read_raw_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*laddr++ = *s++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0	/* Cause a link error for bus_space_read_raw_region_8 */
@@ -304,7 +304,7 @@ bus_space_write_raw_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *laddr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 static __inline void
@@ -318,7 +318,7 @@ bus_space_write_raw_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
 
 	while (count--)
 		*d++ = *laddr++;
-	__asm __volatile("eieio; sync");
+	__asm volatile("eieio; sync");
 }
 
 #if 0
diff --git a/sys/arch/socppc/socppc/cpu.c b/sys/arch/socppc/socppc/cpu.c
index 6c39c34cc32..418bf3d69d0 100644
--- a/sys/arch/socppc/socppc/cpu.c
+++ b/sys/arch/socppc/socppc/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.6 2014/01/19 12:45:36 deraadt Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.7 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2008 Mark Kettenis
@@ -76,7 +76,7 @@ cpu_attach(struct device *parent, struct device *self, void *aux)
 	/* Enable data cache. */
 	hid0 = ppc_mfhid0();
 	if ((hid0 & HID0_DCE) == 0) {
-		__asm __volatile (
+		__asm volatile (
 		    "sync; mtspr 1008,%0; mtspr 1008,%1"
 		    :: "r" (hid0 | HID0_DCFI), "r" (hid0 | HID0_DCE));
 	}
@@ -84,7 +84,7 @@ cpu_attach(struct device *parent, struct device *self, void *aux)
 	/* Enable instruction cache. */
 	hid0 = ppc_mfhid0();
 	if ((hid0 & HID0_ICE) == 0) {
-		__asm __volatile (
+		__asm volatile (
 		    "isync; mtspr 1008,%0; mtspr 1008,%1"
 		    :: "r" (hid0 | HID0_ICFI), "r" (hid0 | HID0_ICE));
 	}
diff --git a/sys/arch/socppc/stand/boot/machdep.c b/sys/arch/socppc/stand/boot/machdep.c
index 3bbc6339270..e5e3c0bb480 100644
--- a/sys/arch/socppc/stand/boot/machdep.c
+++ b/sys/arch/socppc/stand/boot/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.5 2013/11/08 13:05:21 fgsch Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2008 Mark Kettenis
@@ -145,7 +145,7 @@ _rtt(void)
 	uint32_t v;
 
 	*((volatile uint32_t *)(RPR)) = RPR_RSTE;
-	__asm __volatile("eieio");
+	__asm volatile("eieio");
 	*((volatile uint32_t *)(RCR)) = RCR_SWHR;
 
 	printf("RESET FAILED\n");
diff --git a/sys/arch/sparc/dev/magmareg.h b/sys/arch/sparc/dev/magmareg.h
index 95613b07901..f3ada19c1fa 100644
--- a/sys/arch/sparc/dev/magmareg.h
+++ b/sys/arch/sparc/dev/magmareg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: magmareg.h,v 1.11 2009/04/10 20:53:51 miod Exp $	*/
+/*	$OpenBSD: magmareg.h,v 1.12 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*-
  *  Copyright (c) 1998 Iain Hibbert
@@ -75,7 +75,7 @@ struct magma_board_info {
  * cd1400 chip data
  */
 struct cd1400 {
-	__volatile u_char *cd_reg;	/* chip registers */
+	volatile u_char *cd_reg;	/* chip registers */
 	int cd_chiprev;			/* chip revision */
 	int cd_clock;			/* clock speed in MHz */
 	int cd_parmode;			/* parallel mode operation */
@@ -85,7 +85,7 @@ struct cd1400 {
  * cd1190 chip data
  */
 struct cd1190 {
-	__volatile u_char *cd_reg;	/* chip registers */
+	volatile u_char *cd_reg;	/* chip registers */
 	int cd_chiprev;			/* chip revision */
 };
 
@@ -96,9 +96,9 @@ struct magma_softc {
 	/* cd1400 chip info */
 	int ms_ncd1400;
 	struct cd1400 ms_cd1400[MAGMA_MAX_CD1400];
-	__volatile u_char *ms_svcackr;	/* CD1400 service acknowledge receive */
-	__volatile u_char *ms_svcackt;	/* CD1400 service acknowledge transmit */
-	__volatile u_char *ms_svcackm;	/* CD1400 service acknowledge modem */
+	volatile u_char *ms_svcackr;	/* CD1400 service acknowledge receive */
+	volatile u_char *ms_svcackt;	/* CD1400 service acknowledge transmit */
+	volatile u_char *ms_svcackm;	/* CD1400 service acknowledge modem */
 
 	/* cd1190 chip info */
 	int ms_ncd1190;
diff --git a/sys/arch/sparc/include/atomic.h b/sys/arch/sparc/include/atomic.h
index 1eb4e49631b..5c3d0cb4b04 100644
--- a/sys/arch/sparc/include/atomic.h
+++ b/sys/arch/sparc/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.5 2011/03/23 16:54:37 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -10,7 +10,7 @@
 #include <machine/psl.h>
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int psr;
 
@@ -21,7 +21,7 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int psr;
 
diff --git a/sys/arch/sparc/include/psl.h b/sys/arch/sparc/include/psl.h
index 80cee8efffc..7cda4564dbe 100644
--- a/sys/arch/sparc/include/psl.h
+++ b/sys/arch/sparc/include/psl.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: psl.h,v 1.27 2013/05/17 19:38:52 kettenis Exp $	*/
+/*	$OpenBSD: psl.h,v 1.28 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: psl.h,v 1.12 1997/03/10 21:49:11 pk Exp $ */
 
 /*
@@ -119,7 +119,7 @@ getpsr()
 {
 	int psr;
 
-	__asm __volatile("rd %%psr,%0" : "=r" (psr));
+	__asm volatile("rd %%psr,%0" : "=r" (psr));
 	return (psr);
 }
 
@@ -128,7 +128,7 @@ getmid()
 {
 	int mid;
 
-	__asm __volatile("rd %%tbr,%0" : "=r" (mid));
+	__asm volatile("rd %%tbr,%0" : "=r" (mid));
 	return ((mid >> 20) & 0x3);
 }
 
@@ -136,10 +136,10 @@ static __inline void
 setpsr(newpsr)
 	int newpsr;
 {
-	__asm __volatile("wr %0,0,%%psr" : : "r" (newpsr));
-	__asm __volatile("nop");
-	__asm __volatile("nop");
-	__asm __volatile("nop");
+	__asm volatile("wr %0,0,%%psr" : : "r" (newpsr));
+	__asm volatile("nop");
+	__asm volatile("nop");
+	__asm volatile("nop");
 }
 
 static __inline int
@@ -152,15 +152,15 @@ spl0()
 	 * which gives us the same value as the old psr but with all
 	 * the old PIL bits turned off.
 	 */
-	__asm __volatile("rd %%psr,%0" : "=r" (psr));
+	__asm volatile("rd %%psr,%0" : "=r" (psr));
 	oldipl = psr & PSR_PIL;
-	__asm __volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl));
+	__asm volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl));
 
 	/*
 	 * Three instructions must execute before we can depend
 	 * on the bits to be changed.
 	 */
-	__asm __volatile("nop; nop; nop");
+	__asm volatile("nop; nop; nop");
 	return (oldipl);
 }
 
@@ -193,13 +193,13 @@ static __inline int name(void); \
 static __inline int name() \
 { \
 	int psr, oldipl; \
-	__asm __volatile("rd %%psr,%0" : "=r" (psr)); \
+	__asm volatile("rd %%psr,%0" : "=r" (psr)); \
 	oldipl = psr & PSR_PIL; \
 	psr &= ~oldipl; \
-	__asm __volatile("wr %0,%1,%%psr" : : \
+	__asm volatile("wr %0,%1,%%psr" : : \
 	    "r" (psr), "n" ((newipl) << 8)); \
-	__asm __volatile("nop; nop; nop"); \
-	__asm __volatile("":::"memory");	/* protect from reordering */ \
+	__asm volatile("nop; nop; nop"); \
+	__asm volatile("":::"memory");	/* protect from reordering */ \
 	return (oldipl); \
 }
 /* A non-priority-decreasing version of SPL */
@@ -208,15 +208,15 @@ static __inline int name(void); \
 static __inline int name() \
 { \
 	int psr, oldipl; \
-	__asm __volatile("rd %%psr,%0" : "=r" (psr)); \
+	__asm volatile("rd %%psr,%0" : "=r" (psr)); \
 	oldipl = psr & PSR_PIL; \
 	if ((newipl << 8) <= oldipl) \
 		return oldipl; \
 	psr &= ~oldipl; \
-	__asm __volatile("wr %0,%1,%%psr" : : \
+	__asm volatile("wr %0,%1,%%psr" : : \
 	    "r" (psr), "n" ((newipl) << 8)); \
-	__asm __volatile("nop; nop; nop"); \
-	__asm __volatile("":::"memory");	/* protect from reordering */ \
+	__asm volatile("nop; nop; nop"); \
+	__asm volatile("":::"memory");	/* protect from reordering */ \
 	return (oldipl); \
 }
 
@@ -240,11 +240,11 @@ static __inline int splhigh()
 {
 	int psr, oldipl;
 
-	__asm __volatile("rd %%psr,%0" : "=r" (psr));
-	__asm __volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL));
-	__asm __volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \
+	__asm volatile("rd %%psr,%0" : "=r" (psr));
+	__asm volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL));
+	__asm volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \
 	    "r" (psr), "n" (PSR_PIL));
-	__asm __volatile("":::"memory");	/* protect from reordering */
+	__asm volatile("":::"memory");	/* protect from reordering */
 	return (oldipl);
 }
 
@@ -254,11 +254,11 @@ static __inline void splx(newipl)
 {
 	int psr;
 
-	__asm __volatile("":::"memory");	/* protect from reordering */
-	__asm __volatile("rd %%psr,%0" : "=r" (psr));
-	__asm __volatile("wr %0,%1,%%psr" : : \
+	__asm volatile("":::"memory");	/* protect from reordering */
+	__asm volatile("rd %%psr,%0" : "=r" (psr));
+	__asm volatile("wr %0,%1,%%psr" : : \
 	    "r" (psr & ~PSR_PIL), "rn" (newipl));
-	__asm __volatile("nop; nop; nop");
+	__asm volatile("nop; nop; nop");
 }
 #endif /* KERNEL && !_LOCORE */
 
diff --git a/sys/arch/sparc/include/tcb.h b/sys/arch/sparc/include/tcb.h
index d062f8dc00e..7c87df1d6de 100644
--- a/sys/arch/sparc/include/tcb.h
+++ b/sys/arch/sparc/include/tcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tcb.h,v 1.3 2011/11/08 22:46:07 kettenis Exp $	*/
+/*	$OpenBSD: tcb.h,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
@@ -68,7 +68,7 @@ __sparc_read_tcb(int offset)
 #define TCB_GET_MEMBER(member)	\
 	__sparc_read_tcb(offsetof(struct thread_control_block, member))
 
-#define TCB_SET(tcb)	__asm __volatile("mov %0, %%g7" : : "r" (tcb))
+#define TCB_SET(tcb)	__asm volatile("mov %0, %%g7" : : "r" (tcb))
 
 #endif /* 0 */
 
diff --git a/sys/arch/sparc/sparc/asm.h b/sys/arch/sparc/sparc/asm.h
index 06efbef5320..5e94548ebff 100644
--- a/sys/arch/sparc/sparc/asm.h
+++ b/sys/arch/sparc/sparc/asm.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: asm.h,v 1.5 2003/06/02 23:27:55 millert Exp $	*/
+/*	$OpenBSD: asm.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: asm.h,v 1.4 1996/07/01 18:01:26 abrown Exp $ */
 
 /*
@@ -61,7 +61,7 @@
 /* load byte from alternate address space */
 #define	lduba(loc, asi) ({ \
 	register int _lduba_v; \
-	__asm __volatile("lduba [%1]%2,%0" : "=r" (_lduba_v) : \
+	__asm volatile("lduba [%1]%2,%0" : "=r" (_lduba_v) : \
 	    "r" ((int)(loc)), "n" (asi)); \
 	_lduba_v; \
 })
@@ -69,7 +69,7 @@
 /* load half-word from alternate address space */
 #define	lduha(loc, asi) ({ \
 	register int _lduha_v; \
-	__asm __volatile("lduha [%1]%2,%0" : "=r" (_lduha_v) : \
+	__asm volatile("lduha [%1]%2,%0" : "=r" (_lduha_v) : \
 	    "r" ((int)(loc)), "n" (asi)); \
 	_lduha_v; \
 })
@@ -77,49 +77,49 @@
 /* load int from alternate address space */
 #define	lda(loc, asi) ({ \
 	register int _lda_v; \
-	__asm __volatile("lda [%1]%2,%0" : "=r" (_lda_v) : \
+	__asm volatile("lda [%1]%2,%0" : "=r" (_lda_v) : \
 	    "r" ((int)(loc)), "n" (asi)); \
 	_lda_v; \
 })
 
 /* store byte to alternate address space */
 #define	stba(loc, asi, value) ({ \
-	__asm __volatile("stba %0,[%1]%2" : : \
+	__asm volatile("stba %0,[%1]%2" : : \
 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
 })
 
 /* store half-word to alternate address space */
 #define	stha(loc, asi, value) ({ \
-	__asm __volatile("stha %0,[%1]%2" : : \
+	__asm volatile("stha %0,[%1]%2" : : \
 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
 })
 
 /* store int to alternate address space */
 #define	sta(loc, asi, value) ({ \
-	__asm __volatile("sta %0,[%1]%2" : : \
+	__asm volatile("sta %0,[%1]%2" : : \
 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
 })
 
 /* load 64-bit int from alternate address space */
 #define	ldda(loc, asi) ({ \
 	register long long _lda_v; \
-	__asm __volatile("ldda [%1]%2,%0" : "=r" (_lda_v) : \
+	__asm volatile("ldda [%1]%2,%0" : "=r" (_lda_v) : \
 	    "r" ((int)(loc)), "n" (asi)); \
 	_lda_v; \
 })
 
 /* store 64-bit int to alternate address space */
 #define	stda(loc, asi, value) ({ \
-	__asm __volatile("stda %0,[%1]%2" : : \
+	__asm volatile("stda %0,[%1]%2" : : \
 	    "r" ((long long)(value)), "r" ((int)(loc)), "n" (asi)); \
 })
 
 /* atomic swap of a word between a register and memory */
 #define swap(loc, val) ({ \
-        __asm __volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \
+        __asm volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \
 })
 
 #define wrasr(value, asr) _wrasr(value, asr)
 #define _wrasr(value, asr) ({ \
-	__asm __volatile("wr %0, 0, %%asr"#asr : : "r" ((int)(value))); \
+	__asm volatile("wr %0, 0, %%asr"#asr : : "r" ((int)(value))); \
 })
diff --git a/sys/arch/sparc/sparc/in_cksum.c b/sys/arch/sparc/sparc/in_cksum.c
index deb192634b9..e66499d0192 100644
--- a/sys/arch/sparc/sparc/in_cksum.c
+++ b/sys/arch/sparc/sparc/in_cksum.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: in_cksum.c,v 1.12 2008/02/16 23:02:41 miod Exp $	*/
+/*	$OpenBSD: in_cksum.c,v 1.13 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: in_cksum.c,v 1.7 1996/10/05 23:44:34 mrg Exp $ */
 
 /*
@@ -75,7 +75,7 @@
  * Zubin Dittia (zubin@dworkin.wustl.edu)
  */
 
-#define Asm	__asm __volatile
+#define Asm	__asm volatile
 #define ADD64		Asm("	ld [%4+ 0],%1;   ld [%4+ 4],%2;		\
 				addcc  %0,%1,%0; addxcc %0,%2,%0;	\
 				ld [%4+ 8],%1;   ld [%4+12],%2;		\
diff --git a/sys/arch/sparc64/dev/creator.c b/sys/arch/sparc64/dev/creator.c
index 5cb3a946cba..04effe065db 100644
--- a/sys/arch/sparc64/dev/creator.c
+++ b/sys/arch/sparc64/dev/creator.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: creator.c,v 1.46 2013/10/20 20:07:27 miod Exp $	*/
+/*	$OpenBSD: creator.c,v 1.47 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -826,7 +826,7 @@ creator_load_sram(struct creator_softc *sc, u_int32_t *ucode, u_int32_t size)
 	while (size > 0) {
 		creator_ras_fifo_wait(sc, 16);
 
-		__asm__ __volatile__("ld	[%0 + 0x00], %%f1\n\t"
+		__asm__ volatile("ld	[%0 + 0x00], %%f1\n\t"
 				     "ld	[%0 + 0x04], %%f0\n\t"
 				     "ld	[%0 + 0x08], %%f3\n\t"
 				     "ld	[%0 + 0x0c], %%f2\n\t"
diff --git a/sys/arch/sparc64/include/atomic.h b/sys/arch/sparc64/include/atomic.h
index 84f6e1c411c..29d05829631 100644
--- a/sys/arch/sparc64/include/atomic.h
+++ b/sys/arch/sparc64/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.10 2014/03/15 06:18:00 dlg Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.11 2014/03/29 18:09:30 guenther Exp $	*/
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
  *
@@ -23,7 +23,7 @@
 static inline unsigned int
 _atomic_cas_uint(volatile unsigned int *p, unsigned int e, unsigned int n)
 {
-	__asm __volatile("cas [%2], %3, %0"
+	__asm volatile("cas [%2], %3, %0"
 	    : "+r" (n), "=m" (*p)
 	    : "r" (p), "r" (e), "m" (*p));
 
@@ -34,7 +34,7 @@ _atomic_cas_uint(volatile unsigned int *p, unsigned int e, unsigned int n)
 static inline unsigned long
 _atomic_cas_ulong(volatile unsigned long *p, unsigned long e, unsigned long n)
 {
-	__asm __volatile("casx [%2], %3, %0"
+	__asm volatile("casx [%2], %3, %0"
 	    : "+r" (n), "=m" (*p)
 	    : "r" (p), "r" (e), "m" (*p));
 
@@ -45,7 +45,7 @@ _atomic_cas_ulong(volatile unsigned long *p, unsigned long e, unsigned long n)
 static inline void *
 _atomic_cas_ptr(volatile void **p, void *e, void *n)
 {
-	__asm __volatile("casx [%2], %3, %0"
+	__asm volatile("casx [%2], %3, %0"
 	    : "+r" (n), "=m" (*p)
 	    : "r" (p), "r" (e), "m" (*p));
 
diff --git a/sys/arch/sparc64/include/cpu.h b/sys/arch/sparc64/include/cpu.h
index c99919f8902..c78ee0b71ae 100644
--- a/sys/arch/sparc64/include/cpu.h
+++ b/sys/arch/sparc64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.83 2013/05/31 17:00:59 tedu Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.84 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: cpu.h,v 1.28 2001/06/14 22:56:58 thorpej Exp $ */
 
 /*
@@ -174,7 +174,7 @@ curcpu(void)
 {
 	struct cpu_info *ci;
 
-	__asm __volatile("mov %%g7, %0" : "=r"(ci));
+	__asm volatile("mov %%g7, %0" : "=r"(ci));
 	return (ci->ci_self);
 }
 
@@ -264,7 +264,7 @@ void	savefpstate(struct fpstate64 *);
 void	loadfpstate(struct fpstate64 *);
 void	clearfpstate(void);
 u_int64_t	probeget(paddr_t, int, int);
-#define	 write_all_windows() __asm __volatile("flushw" : : )
+#define	 write_all_windows() __asm volatile("flushw" : : )
 void	write_user_windows(void);
 void 	proc_trampoline(void);
 struct pcb;
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h
index c1cd7411f16..8918341d91f 100644
--- a/sys/arch/sparc64/include/ctlreg.h
+++ b/sys/arch/sparc64/include/ctlreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ctlreg.h,v 1.25 2012/11/07 16:31:03 kettenis Exp $	*/
+/*	$OpenBSD: ctlreg.h,v 1.26 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */
 
 /*
@@ -522,11 +522,11 @@
  * D$ so we need to flush the D$ to make sure we don't get data pollution.
  */
 
-#define sparc_membar(mask) do {                                         \
-        if (mask)                                                       \
-                __asm __volatile("membar %0" : : "n" (mask) : "memory");\
-        else                                                            \
-                __asm __volatile("" : : : "memory");                    \
+#define sparc_membar(mask) do {						\
+	if (mask)							\
+		__asm volatile("membar %0" : : "n" (mask) : "memory");	\
+	else								\
+		__asm volatile("" : : : "memory");			\
 } while(0)
 
 #define membar sparc_membar
@@ -541,22 +541,22 @@
 #define sparc_wr(name, val, xor)					\
 do {									\
 	if (__builtin_constant_p(xor))					\
-		__asm __volatile("wr %%g0, %0, %%" #name		\
+		__asm volatile("wr %%g0, %0, %%" #name			\
 		    : : "rI" ((val) ^ (xor)) : "%g0");			\
 	else								\
-		__asm __volatile("wr %0, %1, %%" #name			\
+		__asm volatile("wr %0, %1, %%" #name			\
 		    : : "r" (val), "rI" (xor) : "%g0");			\
 } while(0)
 
 #define sparc_wrpr(name, val, xor)					\
 do {									\
 	if (__builtin_constant_p(xor))					\
-		__asm __volatile("wrpr %%g0, %0, %%" #name		\
+		__asm volatile("wrpr %%g0, %0, %%" #name		\
 		    : : "rI" ((val) ^ (xor)) : "%g0");			\
 	else								\
-		__asm __volatile("wrpr %0, %1, %%" #name		\
+		__asm volatile("wrpr %0, %1, %%" #name			\
 		    : : "r" (val), "rI" (xor) : "%g0");			\
-	__asm __volatile("" : : : "memory");				\
+	__asm volatile("" : : : "memory");				\
 } while(0)
 
 
@@ -567,7 +567,7 @@ extern __inline u_int64_t						\
 sparc_rd_ ## name()							\
 {									\
 	u_int64_t r;							\
-	__asm __volatile("rd %%" #name ", %0" :				\
+	__asm volatile("rd %%" #name ", %0" :				\
 	    "=r" (r) : : "%g0");					\
 	return (r);							\
 }
@@ -579,7 +579,7 @@ extern __inline u_int64_t						\
 sparc_rdpr_ ## name()							\
 {									\
 	u_int64_t r;							\
-	__asm __volatile("rdpr %%" #name ", %0" :			\
+	__asm volatile("rdpr %%" #name ", %0" :				\
 	    "=r" (r) : : "%g0");					\
 	return (r);							\
 }
@@ -612,7 +612,7 @@ GEN_RDPR(ver);
 	o ## _asi(paddr_t va)						\
 	{								\
 		tp r;							\
-		__asm __volatile(					\
+		__asm volatile(						\
 		    #o " [%1] %%asi, %0"				\
 		    : "=r" (r)						\
 		    : "r" ((volatile tp *)va)				\
@@ -640,7 +640,7 @@ LDNC_GEN(int, lda);
 	    (sizeof(type) == 1 && asi == ASI_PRIMARY_LITTLE))		\
 		__r ## op ## type = *((volatile type *)va);		\
 	else								\
-		__asm __volatile(#opa " [%1] " #asi ", %0"		\
+		__asm volatile(#opa " [%1] " #asi ", %0"		\
 		    : "=r" (__r ## op ## type)				\
 		    : "r" ((volatile type *)va)				\
 		    : "%g0");						\
@@ -664,7 +664,7 @@ LDNC_GEN(int, lda);
 	extern __inline void						\
 	o ## _asi(paddr_t va, tp val)					\
 	{								\
-		__asm __volatile(					\
+		__asm volatile(						\
 		    #o " %0, [%1] %%asi"				\
 		    :							\
 		    : "r" (val), "r" ((volatile tp *)va)		\
@@ -690,7 +690,7 @@ STNC_GEN(u_int, sta);
 	    (sizeof(type) == 1 && asi == ASI_PRIMARY_LITTLE))		\
 		*((volatile type *)va) = val;				\
 	else								\
-		__asm __volatile(#opa " %0, [%1] " #asi			\
+		__asm volatile(#opa " %0, [%1] " #asi			\
 		    : : "r" (val), "r" ((volatile type *)va)		\
 		    : "memory");					\
 	})
@@ -728,7 +728,7 @@ extern __inline void flush(void *);
 extern __inline
 void flush(void *p)
 {
-	__asm __volatile("flush %0"
+	__asm volatile("flush %0"
 	    : : "r" (p)
 	    : "memory");
 }
diff --git a/sys/arch/sparc64/include/mutex.h b/sys/arch/sparc64/include/mutex.h
index 73a061419ad..0ac9deb5b5e 100644
--- a/sys/arch/sparc64/include/mutex.h
+++ b/sys/arch/sparc64/include/mutex.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mutex.h,v 1.3 2013/07/14 21:22:08 kettenis Exp $	*/
+/*	$OpenBSD: mutex.h,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
@@ -29,7 +29,7 @@
 #define _MACHINE_MUTEX_H_
 
 struct mutex {
-	__volatile void *mtx_owner; /* mutex.S relies upon this being first */
+	volatile void *mtx_owner; /* mutex.S relies upon this being first */
 	int mtx_wantipl;
 	int mtx_oldipl;
 };
diff --git a/sys/arch/sparc64/include/proc.h b/sys/arch/sparc64/include/proc.h
index 6ae7daa48d7..59ad6e5a1b6 100644
--- a/sys/arch/sparc64/include/proc.h
+++ b/sys/arch/sparc64/include/proc.h
@@ -46,7 +46,7 @@
 struct mdproc {
 	struct	trapframe64 *md_tf;	/* trap/syscall registers */
 	struct	fpstate64 *md_fpstate;	/* fpu state, if any; always resident */
-	__volatile int md_astpending;
+	volatile int md_astpending;
 };
 
 #define	__HAVE_MD_TCB
diff --git a/sys/arch/sparc64/include/psl.h b/sys/arch/sparc64/include/psl.h
index bd7406f4e0b..d3fb5e8f6d4 100644
--- a/sys/arch/sparc64/include/psl.h
+++ b/sys/arch/sparc64/include/psl.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: psl.h,v 1.27 2010/05/31 21:39:56 deraadt Exp $	*/
+/*	$OpenBSD: psl.h,v 1.28 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: psl.h,v 1.20 2001/04/13 23:30:05 thorpej Exp $ */
 
 /*
@@ -356,12 +356,12 @@ extern __inline int name(void);						\
 extern __inline int name()						\
 {									\
 	int oldpil;							\
-	__asm __volatile("    rdpr %%pil, %0		\n"		\
+	__asm volatile("    rdpr %%pil, %0		\n"		\
 			 "    wrpr %%g0, %1, %%pil	\n"		\
 	    : "=&r" (oldpil)						\
 	    : "n" (newpil)						\
 	    : "%g0");							\
-	__asm __volatile("" : : : "memory");				\
+	__asm volatile("" : : : "memory");				\
 	return (oldpil);						\
 }
 /* A non-priority-decreasing version of SPL */
@@ -372,7 +372,7 @@ extern __inline int name()						\
 	int oldpil;							\
 									\
 	if (newpil <= 1) {						\
-		__asm __volatile("    rdpr	%%pil, %0	\n"	\
+		__asm volatile("    rdpr	%%pil, %0	\n"	\
 				 "    brnz,pn	%0, 1f		\n"	\
 				 "     nop			\n"	\
 				 "    wrpr	%%g0, %1, %%pil	\n"	\
@@ -381,7 +381,7 @@ extern __inline int name()						\
 	    : "I" (newpil)						\
 	    : "%g0");							\
 	} else {							\
-		__asm __volatile("    rdpr	%%pil, %0	\n"	\
+		__asm volatile("    rdpr	%%pil, %0	\n"	\
 				 "    cmp	%0, %1 - 1	\n"	\
 				 "    bgu,pn	%%xcc, 1f	\n"	\
 				 "     nop			\n"	\
@@ -391,7 +391,7 @@ extern __inline int name()						\
 	    : "I" (newpil)						\
 	    : "cc");							\
 	}								\
-	__asm __volatile("" : : : "memory");				\
+	__asm volatile("" : : : "memory");				\
 	return (oldpil);						\
 }
 #endif
diff --git a/sys/arch/sparc64/include/tcb.h b/sys/arch/sparc64/include/tcb.h
index 112a807482e..be2085070b0 100644
--- a/sys/arch/sparc64/include/tcb.h
+++ b/sys/arch/sparc64/include/tcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tcb.h,v 1.3 2011/11/08 22:46:07 kettenis Exp $	*/
+/*	$OpenBSD: tcb.h,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2011 Philip Guenther <guenther@openbsd.org>
@@ -68,7 +68,7 @@ __sparc64_read_tcb(int offset)
 #define TCB_GET_MEMBER(member)	\
 	__sparc64_read_tcb(offsetof(struct thread_control_block, member))
 
-#define TCB_SET(tcb)	__asm __volatile("mov %0, %%g7" : : "r" (tcb))
+#define TCB_SET(tcb)	__asm volatile("mov %0, %%g7" : : "r" (tcb))
 
 #endif /* 0 */
 
diff --git a/sys/arch/sparc64/sparc64/autoconf.c b/sys/arch/sparc64/sparc64/autoconf.c
index 5dd2b946cde..c8ba8639260 100644
--- a/sys/arch/sparc64/sparc64/autoconf.c
+++ b/sys/arch/sparc64/sparc64/autoconf.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.c,v 1.117 2012/08/29 20:33:16 kettenis Exp $	*/
+/*	$OpenBSD: autoconf.c,v 1.118 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: autoconf.c,v 1.51 2001/07/24 19:32:11 eeh Exp $ */
 
 /*
@@ -1267,7 +1267,7 @@ void
 callrom()
 {
 
-	__asm __volatile("wrpr	%%g0, 0, %%tl" : );
+	__asm volatile("wrpr	%%g0, 0, %%tl" : );
 	OF_enter();
 }
 
diff --git a/sys/arch/sparc64/sparc64/clock.c b/sys/arch/sparc64/sparc64/clock.c
index 87c15e03b70..15c58e90c52 100644
--- a/sys/arch/sparc64/sparc64/clock.c
+++ b/sys/arch/sparc64/sparc64/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.51 2014/02/08 11:04:50 kettenis Exp $	*/
+/*	$OpenBSD: clock.c,v 1.52 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: clock.c,v 1.41 2001/07/24 19:29:25 eeh Exp $ */
 
 /*
@@ -1037,7 +1037,7 @@ tick_get_timecount(struct timecounter *tc)
 {
 	u_int64_t tick;
 
-	__asm __volatile("rd %%tick, %0" : "=r" (tick) :);
+	__asm volatile("rd %%tick, %0" : "=r" (tick) :);
 
 	return (tick & ~0u);
 }
@@ -1047,7 +1047,7 @@ sys_tick_get_timecount(struct timecounter *tc)
 {
 	u_int64_t tick;
 
-	__asm __volatile("rd %%sys_tick, %0" : "=r" (tick) :);
+	__asm volatile("rd %%sys_tick, %0" : "=r" (tick) :);
 
 	return (tick & ~0u);
 }
diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c
index 421d7173e90..976e74bfbe2 100644
--- a/sys/arch/sparc64/sparc64/cpu.c
+++ b/sys/arch/sparc64/sparc64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.61 2014/01/19 12:45:36 deraadt Exp $	*/
+/*	$OpenBSD: cpu.c,v 1.62 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: cpu.c,v 1.13 2001/05/26 21:27:15 chs Exp $ */
 
 /*
@@ -794,7 +794,7 @@ cpu_idle_cycle(void)
 	 * just as well as using the suspend instruction and makes the
 	 * code a little bit less complicated.
 	 */
-	__asm __volatile(
+	__asm volatile(
 		"999:	nop					\n"
 		"	.section .sun4u_mtp_patch, \"ax\"	\n"
 		"	.word	999b				\n"
diff --git a/sys/arch/sparc64/sparc64/db_interface.c b/sys/arch/sparc64/sparc64/db_interface.c
index 96d351fe992..d8fba368c84 100644
--- a/sys/arch/sparc64/sparc64/db_interface.c
+++ b/sys/arch/sparc64/sparc64/db_interface.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_interface.c,v 1.32 2012/03/23 15:51:26 guenther Exp $	*/
+/*	$OpenBSD: db_interface.c,v 1.33 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: db_interface.c,v 1.61 2001/07/31 06:55:47 eeh Exp $ */
 
 /*
@@ -426,7 +426,7 @@ void db_print_dtlb_entry(int entry, int i, int endc);
 extern __inline__ unsigned long db_get_dtlb_data(int entry)
 {
 	unsigned long r;
-	__asm__ __volatile__("ldxa [%1] %2,%0"
+	__asm__ volatile("ldxa [%1] %2,%0"
 		: "=r" (r)
 		: "r" (entry <<3), "i" (ASI_DMMU_TLB_DATA));
 	return r;
@@ -434,7 +434,7 @@ extern __inline__ unsigned long db_get_dtlb_data(int entry)
 extern __inline__ unsigned long db_get_dtlb_tag(int entry)
 {
 	unsigned long r;
-	__asm__ __volatile__("ldxa [%1] %2,%0"
+	__asm__ volatile("ldxa [%1] %2,%0"
 		: "=r" (r)
 		: "r" (entry <<3), "i" (ASI_DMMU_TLB_TAG));
 	return r;
@@ -442,7 +442,7 @@ extern __inline__ unsigned long db_get_dtlb_tag(int entry)
 extern __inline__ unsigned long db_get_itlb_data(int entry)
 {
 	unsigned long r;
-	__asm__ __volatile__("ldxa [%1] %2,%0"
+	__asm__ volatile("ldxa [%1] %2,%0"
 		: "=r" (r)
 		: "r" (entry <<3), "i" (ASI_IMMU_TLB_DATA));
 	return r;
@@ -450,7 +450,7 @@ extern __inline__ unsigned long db_get_itlb_data(int entry)
 extern __inline__ unsigned long db_get_itlb_tag(int entry)
 {
 	unsigned long r;
-	__asm__ __volatile__("ldxa [%1] %2,%0"
+	__asm__ volatile("ldxa [%1] %2,%0"
 		: "=r" (r)
 		: "r" (entry <<3), "i" (ASI_IMMU_TLB_TAG));
 	return r;
diff --git a/sys/arch/sparc64/sparc64/in4_cksum.c b/sys/arch/sparc64/sparc64/in4_cksum.c
index abf6537bd83..e731c5f9d32 100644
--- a/sys/arch/sparc64/sparc64/in4_cksum.c
+++ b/sys/arch/sparc64/sparc64/in4_cksum.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: in4_cksum.c,v 1.3 2008/05/15 22:17:08 brad Exp $	*/
+/*	$OpenBSD: in4_cksum.c,v 1.4 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: in4_cksum.c,v 1.5 2003/10/13 14:22:20 agc Exp $ */
 
 /*
@@ -113,7 +113,7 @@ in4_cksum(struct mbuf *m, u_int8_t nxt, int off, int len)
 		ipov.ih_dst = mtod(m, struct ip *)->ip_dst;
 		w = (u_char *)&ipov;
 		/* assumes sizeof(ipov) == 20 */
-		__asm __volatile(" lduw [%5 + 0], %1; "
+		__asm volatile(" lduw [%5 + 0], %1; "
 			" lduw [%5 + 4], %2; "
 			" lduw [%5 + 8], %3; add %0, %1, %0; "
 			" lduw [%5 + 12], %1; add %0, %2, %0; "
diff --git a/sys/arch/sparc64/sparc64/intr.c b/sys/arch/sparc64/sparc64/intr.c
index 15e569106ca..92c78d31ffb 100644
--- a/sys/arch/sparc64/sparc64/intr.c
+++ b/sys/arch/sparc64/sparc64/intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.c,v 1.46 2014/01/21 10:19:31 dlg Exp $	*/
+/*	$OpenBSD: intr.c,v 1.47 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: intr.c,v 1.39 2001/07/19 23:38:11 eeh Exp $ */
 
 /*
@@ -359,7 +359,7 @@ splassert_check(int wantipl, const char *func)
 	struct cpu_info *ci = curcpu();
 	int oldipl;
 
-	__asm __volatile("rdpr %%pil,%0" : "=r" (oldipl));
+	__asm volatile("rdpr %%pil,%0" : "=r" (oldipl));
 
 	if (oldipl < wantipl) {
 		splassert_fail(wantipl, oldipl, func);
diff --git a/sys/arch/sparc64/sparc64/ipifuncs.c b/sys/arch/sparc64/sparc64/ipifuncs.c
index d3ccc9acf19..9d3393414b2 100644
--- a/sys/arch/sparc64/sparc64/ipifuncs.c
+++ b/sys/arch/sparc64/sparc64/ipifuncs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ipifuncs.c,v 1.13 2009/02/12 18:53:14 miod Exp $	*/
+/*	$OpenBSD: ipifuncs.c,v 1.14 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: ipifuncs.c,v 1.8 2006/10/07 18:11:36 rjs Exp $ */
 
 /*-
@@ -86,7 +86,7 @@ sun4u_send_ipi(int itid, void (*func)(void), u_int64_t arg0, u_int64_t arg1)
 		shift = (itid & 0x3) * 2;
 
 	if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift)) {
-		__asm __volatile("ta 1; nop");
+		__asm volatile("ta 1; nop");
 	}
 
 	/* Schedule an interrupt. */
@@ -120,7 +120,7 @@ sun4u_send_ipi(int itid, void (*func)(void), u_int64_t arg0, u_int64_t arg1)
 	else
 		panic("ipi_send: couldn't send ipi");
 #else
-	__asm __volatile("ta 1; nop" : :);
+	__asm volatile("ta 1; nop" : :);
 #endif
 }
 
diff --git a/sys/arch/sparc64/sparc64/lock_machdep.c b/sys/arch/sparc64/sparc64/lock_machdep.c
index c653ae03faa..92d59254703 100644
--- a/sys/arch/sparc64/sparc64/lock_machdep.c
+++ b/sys/arch/sparc64/sparc64/lock_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock_machdep.c,v 1.6 2014/03/14 01:20:44 dlg Exp $	*/
+/*	$OpenBSD: lock_machdep.c,v 1.7 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -59,7 +59,7 @@ extern int __mp_lock_spinout;
 static __inline void
 __mp_lock_spin_hook(void)
 {
-	__asm __volatile(
+	__asm volatile(
 		"999:	rd	%%ccr, %%g0			\n"
 		"	rd	%%ccr, %%g0			\n"
 		"	rd	%%ccr, %%g0			\n"
diff --git a/sys/arch/sparc64/sparc64/openfirm.c b/sys/arch/sparc64/sparc64/openfirm.c
index 1ae1392b110..e46bee8a949 100644
--- a/sys/arch/sparc64/sparc64/openfirm.c
+++ b/sys/arch/sparc64/sparc64/openfirm.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: openfirm.c,v 1.14 2010/04/10 14:02:49 kettenis Exp $	*/
+/*	$OpenBSD: openfirm.c,v 1.15 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: openfirm.c,v 1.13 2001/06/21 00:08:02 eeh Exp $	*/
 
 /*
@@ -770,7 +770,7 @@ void OF_sym2val(cells)
 	db_expr_t value;
 
 	/* Set data segment pointer */
-	__asm __volatile("clr %%g4" : :); 
+	__asm volatile("clr %%g4" : :); 
 
 	/* No args?  Nothing to do. */
 	if (!args->nargs || 
@@ -807,7 +807,7 @@ void OF_val2sym(cells)
 	db_expr_t offset;
 
 	/* Set data segment pointer */
-	__asm __volatile("clr %%g4" : :);
+	__asm volatile("clr %%g4" : :);
 
 	if (obp_symbol_debug)
 		prom_printf("OF_val2sym: nargs %lx nreturns %lx\r\n",
diff --git a/sys/arch/vax/include/atomic.h b/sys/arch/vax/include/atomic.h
index 4ff15e2e49c..4b7f1a9288d 100644
--- a/sys/arch/vax/include/atomic.h
+++ b/sys/arch/vax/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.5 2011/03/23 16:54:37 pirofti Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 
 /* Public Domain */
 
@@ -11,7 +11,7 @@
 #include <machine/intr.h>
 
 static __inline void
-atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int s;
 
@@ -21,7 +21,7 @@ atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
 }
 
 static __inline void
-atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
+atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 {
 	int s;
 
diff --git a/sys/arch/vax/include/intr.h b/sys/arch/vax/include/intr.h
index 3075ff43e39..3b962668813 100644
--- a/sys/arch/vax/include/intr.h
+++ b/sys/arch/vax/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.17 2014/03/11 19:45:27 guenther Exp $	*/
+/*	$OpenBSD: intr.h,v 1.18 2014/03/29 18:09:30 guenther Exp $	*/
 /* 	$NetBSD: intr.h,v 1.1 1998/08/18 23:55:00 matt Exp $	*/
 
 /*
@@ -63,7 +63,7 @@
 #define _splset(reg)						\
 ({								\
 	register int val;					\
-	__asm __volatile ("mfpr $0x12,%0;mtpr %1,$0x12"		\
+	__asm volatile ("mfpr $0x12,%0;mtpr %1,$0x12"		\
 				: "=&g" (val)			\
 				: "g" (reg));			\
 	val;							\
@@ -72,11 +72,11 @@
 #define	_splraise(reg)						\
 ({								\
 	register int val;					\
-	__asm __volatile ("mfpr $0x12,%0"			\
+	__asm volatile ("mfpr $0x12,%0"				\
 				: "=&g" (val)			\
 				: );				\
 	if ((reg) > val) {					\
-		__asm __volatile ("mtpr %0,$0x12"		\
+		__asm volatile ("mtpr %0,$0x12"			\
 				:				\
 				: "g" (reg));			\
 	}							\
@@ -84,7 +84,7 @@
 })
 
 #define	splx(reg)						\
-	__asm __volatile ("mtpr %0,$0x12" : : "g" (reg))
+	__asm volatile ("mtpr %0,$0x12" : : "g" (reg))
 
 #define	spl0()		_splset(IPL_NONE)
 #define splsoftclock()	_splraise(IPL_SOFTCLOCK)
diff --git a/sys/arch/vax/include/macros.h b/sys/arch/vax/include/macros.h
index bbf0f2475df..1b0d76c6b8e 100644
--- a/sys/arch/vax/include/macros.h
+++ b/sys/arch/vax/include/macros.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macros.h,v 1.21 2014/03/11 19:45:27 guenther Exp $ */
+/*	$OpenBSD: macros.h,v 1.22 2014/03/29 18:09:30 guenther Exp $ */
 /*	$NetBSD: macros.h,v 1.20 2000/07/19 01:02:52 matt Exp $	*/
 
 /*
@@ -43,7 +43,7 @@ ffs(int reg)
 {
 	register int val;
 
-	__asm__ __volatile ("ffs	$0,$32,%1,%0;"
+	__asm__ volatile ("ffs	$0,$32,%1,%0;"
 		"	bneq	1f;"
 		"	mnegl	$1,%0;"
 		"1:	incl	%0"
@@ -57,7 +57,7 @@ strlen(const char *cp)
 {
 	register size_t ret;
 
-	__asm__ __volatile("locc $0,$65535,(%1);subl3 %%r0,$65535,%0"
+	__asm__ volatile("locc $0,$65535,(%1);subl3 %%r0,$65535,%0"
 			: "=r" (ret)
 			: "r" (cp)
 			: "r0","r1","cc" );
@@ -68,7 +68,7 @@ strlen(const char *cp)
 static __inline__ char *
 strncat(char *cp, const char *c2, size_t count)
 {
-	__asm__ __volatile("locc $0,%2,(%1);subl3 %%r0,%2,%%r2;"
+	__asm__ volatile("locc $0,%2,(%1);subl3 %%r0,%2,%%r2;"
 			   "locc $0,$65535,(%0);movc3 %%r2,(%1),(%%r1);"
 			   "movb $0,(%%r3)"
 			:
@@ -81,7 +81,7 @@ strncat(char *cp, const char *c2, size_t count)
 static __inline__ char *
 strncpy(char *cp, const char *c2, size_t len)
 {
-	__asm__ __volatile("movl %2,%%r2;locc $0,%%r2,(%1);beql 1f;"
+	__asm__ volatile("movl %2,%%r2;locc $0,%%r2,(%1);beql 1f;"
 			   "subl3 %%r0,%2,%%r2;clrb (%0)[%%r2];1:"
 			   "movc3 %%r2,(%1),(%0)"
 			:
@@ -94,7 +94,7 @@ static __inline__ void *
 memchr(const void *cp, int c, size_t len)
 {
 	void *ret;
-	__asm__ __volatile("locc %2,%3,(%1);bneq 1f;clrl %%r1;1:movl %%r1,%0"
+	__asm__ volatile("locc %2,%3,(%1);bneq 1f;clrl %%r1;1:movl %%r1,%0"
 			: "=g"(ret)
 			: "r" (cp), "r" (c), "g"(len)
 			: "r0","r1","cc");
@@ -105,7 +105,7 @@ static __inline__ int
 strcmp(const char *cp, const char *c2)
 {
 	register int ret;
-	__asm__ __volatile("locc $0,$65535,(%1);subl3 %%r0,$65535,%%r0;"
+	__asm__ volatile("locc $0,$65535,(%1);subl3 %%r0,$65535,%%r0;"
 			   "incl %%r0;cmpc3 %%r0,(%1),(%2);beql 1f;"
 			   "movl $1,%%r2;cmpb (%%r1),(%%r3);bcc 1f;"
 			   "movl $-1,%%r2;1:movl %%r2,%0"
@@ -122,7 +122,7 @@ locc(int mask, char *cp, size_t size)
 {
 	register ret;
 
-	__asm__ __volatile("locc %1,%2,(%3);movl %%r0,%0"
+	__asm__ volatile("locc %1,%2,(%3);movl %%r0,%0"
 			: "=r" (ret)
 			: "r" (mask),"r"(size),"r"(cp)
 			: "r0","r1" );
@@ -135,7 +135,7 @@ scanc(u_int size, const u_char *cp, const u_char *table, int mask)
 {
 	register int ret;
 
-	__asm__ __volatile("scanc %1,(%2),(%3),%4;movl %%r0,%0"
+	__asm__ volatile("scanc %1,(%2),(%3),%4;movl %%r0,%0"
 			: "=g"(ret)
 			: "r"(size),"r"(cp),"r"(table),"r"(mask)
 			: "r0","r1","r2","r3" );
@@ -147,7 +147,7 @@ skpc(int mask, size_t size, u_char *cp)
 {
 	register int ret;
 
-	__asm__ __volatile("skpc %1,%2,(%3);movl %%r0,%0"
+	__asm__ volatile("skpc %1,%2,(%3);movl %%r0,%0"
 			: "=g"(ret)
 			: "r"(mask),"r"(size),"r"(cp)
 			: "r0","r1" );
@@ -155,7 +155,7 @@ skpc(int mask, size_t size, u_char *cp)
 }
 
 #define	cpu_switchto(o, n) \
-	__asm__ __volatile__( \
+	__asm__ volatile( \
 	    "movl %0, %%r0; movl %1, %%r1; movpsl -(%%sp); jsb __cpu_switchto" \
 	    :: "g"(o), "g"(n) : "r0", "r1");
 
@@ -172,7 +172,7 @@ static __inline__ int
 insqti(void *entry, void *header) {
 	register int ret;
 
-	__asm__ __volatile(
+	__asm__ volatile(
 		"	mnegl $1,%0;"
 		"	insqti (%1),(%2);"
 		"	bcs 1f;			# failed insert"
@@ -197,7 +197,7 @@ static __inline__ void *
 remqhi(void *header) {
 	register void *ret;
 
-	__asm__ __volatile(
+	__asm__ volatile(
 		"	remqhi (%1),%0;"
 		"	bcs 1f;			# failed interlock"
 		"	bvs 2f;			# nothing was removed"
diff --git a/sys/arch/vax/include/mtpr.h b/sys/arch/vax/include/mtpr.h
index df6275b535d..180205dbcc4 100644
--- a/sys/arch/vax/include/mtpr.h
+++ b/sys/arch/vax/include/mtpr.h
@@ -1,4 +1,4 @@
-/*      $OpenBSD: mtpr.h,v 1.8 2013/06/29 13:00:05 miod Exp $     */
+/*      $OpenBSD: mtpr.h,v 1.9 2014/03/29 18:09:30 guenther Exp $     */
 /*      $NetBSD: mtpr.h,v 1.12 1999/06/06 19:06:29 ragge Exp $     */
 
 /*
@@ -161,7 +161,7 @@
 static inline void
 mtpr(register_t val, int reg)
 {
-	__asm__ __volatile ("mtpr %0,%1"
+	__asm__ volatile ("mtpr %0,%1"
 			: /* No output */
 			: "g" (val), "g" (reg)
 			: "memory");
@@ -171,7 +171,7 @@ static inline register_t
 mfpr(int reg)
 {
 	register_t __val;
-	__asm__ __volatile ("mfpr %1,%0"
+	__asm__ volatile ("mfpr %1,%0"
 			: "=g" (__val)
 			: "g" (reg));
 	return __val;
diff --git a/sys/arch/vax/vax/in4_cksum.c b/sys/arch/vax/vax/in4_cksum.c
index 5eebfe0f285..fc916f53cc3 100644
--- a/sys/arch/vax/vax/in4_cksum.c
+++ b/sys/arch/vax/vax/in4_cksum.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: in4_cksum.c,v 1.4 2008/05/15 22:17:08 brad Exp $	*/
+/*	$OpenBSD: in4_cksum.c,v 1.5 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: in4_cksum.c,v 1.8 2003/09/29 22:54:28 matt Exp $	*/
 
 /*
@@ -95,7 +95,7 @@ int in4_cksum_md_debug(struct mbuf *m, u_int8_t nxt, int off, int len);
 #define ADVANCE(n)	{w += n; mlen -= n;}
 #define SWAP		{sum <<= 8;}		/* depends on recent REDUCE */
 
-#define Asm     __asm __volatile
+#define Asm     __asm volatile
 #define ADDL    Asm("addl2 (%2)+,%0" : "=r" (sum) : "0" (sum), "r" (w))
 #define ADWC    Asm("adwc  (%2)+,%0" : "=r" (sum) : "0" (sum), "r" (w))
 #define ADDC    Asm("adwc     $0,%0" : "=r" (sum) : "0" (sum))
@@ -122,7 +122,7 @@ in4_cksum(struct mbuf *m, u_int8_t nxt, int off, int len)
 			panic("in4_cksum: bad mbuf chain");
 #endif
 
-		__asm __volatile(
+		__asm volatile(
 			"movzwl	%3,%0;"	/* mov len to sum */
 			"addb2	%4,%0;"	/* add proto to sum */
 			"rotl	$8,%0,%0;"	/* htons, carry is preserved */
diff --git a/sys/arch/vax/vax/in_cksum.c b/sys/arch/vax/vax/in_cksum.c
index 73d6d95f02e..1af9719c9d5 100644
--- a/sys/arch/vax/vax/in_cksum.c
+++ b/sys/arch/vax/vax/in_cksum.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: in_cksum.c,v 1.5 2005/05/10 04:04:39 brad Exp $	*/
+/*	$OpenBSD: in_cksum.c,v 1.6 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: in_cksum.c,v 1.7 2003/08/07 16:30:19 agc Exp $	*/
 
 /*
@@ -52,7 +52,7 @@
 #define ADVANCE(n)	{w += n; mlen -= n;}
 #define SWAP		{sum <<= 8;}		/* depends on recent REDUCE */
 
-#define Asm     __asm __volatile
+#define Asm     __asm volatile
 #define ADDL    Asm("addl2 (%2)+,%0" : "=r" (sum) : "0" (sum), "r" (w))
 #define ADWC    Asm("adwc  (%2)+,%0" : "=r" (sum) : "0" (sum), "r" (w))
 #define ADDC    Asm("adwc     $0,%0" : "=r" (sum) : "0" (sum))
diff --git a/sys/arch/zaurus/dev/zts.c b/sys/arch/zaurus/dev/zts.c
index 938a586ae14..182662f7a91 100644
--- a/sys/arch/zaurus/dev/zts.c
+++ b/sys/arch/zaurus/dev/zts.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: zts.c,v 1.15 2011/03/03 21:48:49 kettenis Exp $ */
+/* $OpenBSD: zts.c,v 1.16 2014/03/29 18:09:30 guenther Exp $ */
 /*
  * Copyright (c) 2005 Dale Rahn <drahn@openbsd.org>
  *
@@ -271,8 +271,8 @@ pxa2x0_ccnt_enable(int on)
 	u_int32_t rv;
 
 	on = on ? 0x1 : 0x0;
-	__asm __volatile("mrc p14, 0, %0, c0, c1, 0" : "=r" (rv));
-	__asm __volatile("mcr p14, 0, %0, c0, c1, 0" : : "r" (on));
+	__asm volatile("mrc p14, 0, %0, c0, c1, 0" : "=r" (rv));
+	__asm volatile("mcr p14, 0, %0, c0, c1, 0" : : "r" (on));
 	return ((int)(rv & 0x1));
 }
 
@@ -281,7 +281,7 @@ pxa2x0_read_ccnt(void)
 {
 	u_int32_t rv;
 
-	__asm __volatile("mrc p14, 0, %0, c1, c1, 0" : "=r" (rv));
+	__asm volatile("mrc p14, 0, %0, c1, c1, 0" : "=r" (rv));
 	return (rv);
 }
 
diff --git a/sys/arch/zaurus/zaurus/zaurus_machdep.c b/sys/arch/zaurus/zaurus/zaurus_machdep.c
index 68bb1738332..e96de3ef691 100644
--- a/sys/arch/zaurus/zaurus/zaurus_machdep.c
+++ b/sys/arch/zaurus/zaurus/zaurus_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: zaurus_machdep.c,v 1.41 2014/03/13 03:52:56 dlg Exp $	*/
+/*	$OpenBSD: zaurus_machdep.c,v 1.42 2014/03/29 18:09:30 guenther Exp $	*/
 /*	$NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */
 
 /*
@@ -364,7 +364,7 @@ read_ttb(void)
 {
   long ttb;
 
-  __asm __volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
+  __asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
 
 
   return (pd_entry_t *)(ttb & ~((1<<14)-1));
diff --git a/sys/dev/pci/agp_apple.c b/sys/dev/pci/agp_apple.c
index 4769d7f54cf..8f6f24f21b6 100644
--- a/sys/dev/pci/agp_apple.c
+++ b/sys/dev/pci/agp_apple.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: agp_apple.c,v 1.4 2014/03/26 14:41:41 mpi Exp $	*/
+/*	$OpenBSD: agp_apple.c,v 1.5 2014/03/29 18:09:30 guenther Exp $	*/
 
 /*
  * Copyright (c) 2012 Martin Pieuchot <mpi@openbsd.org>
@@ -167,7 +167,7 @@ agp_apple_set_aperture(void *dev, bus_size_t aperture)
 	return (0);
 }
 
-#define flushd(p) __asm __volatile("dcbst 0,%0; sync" ::"r"(p) : "memory")
+#define flushd(p) __asm volatile("dcbst 0,%0; sync" ::"r"(p) : "memory")
 
 void
 agp_apple_bind_page(void *v, bus_addr_t off, paddr_t pa, int flags)
diff --git a/sys/dev/usb/usbdivar.h b/sys/dev/usb/usbdivar.h
index ddcef4524db..ab2b9742e83 100644
--- a/sys/dev/usb/usbdivar.h
+++ b/sys/dev/usb/usbdivar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: usbdivar.h,v 1.57 2014/03/14 14:11:31 pirofti Exp $ */
+/*	$OpenBSD: usbdivar.h,v 1.58 2014/03/29 18:09:31 guenther Exp $ */
 /*	$NetBSD: usbdivar.h,v 1.70 2002/07/11 21:14:36 augustss Exp $	*/
 /*	$FreeBSD: src/sys/dev/usb/usbdivar.h,v 1.11 1999/11/17 22:33:51 n_hibma Exp $	*/
 
@@ -186,7 +186,7 @@ struct usbd_xfer {
 	u_int32_t		timeout;
 	usbd_status		status;
 	usbd_callback		callback;
-	__volatile char		done;
+	volatile char		done;
 #ifdef DIAGNOSTIC
 	u_int32_t		busy_free;
 #define XFER_FREE 0x46524545
diff --git a/sys/dev/vmt.c b/sys/dev/vmt.c
index 4ca86da4607..52fb0c8d507 100644
--- a/sys/dev/vmt.c
+++ b/sys/dev/vmt.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: vmt.c,v 1.16 2013/11/11 09:15:34 mpi Exp $ */
+/*	$OpenBSD: vmt.c,v 1.17 2014/03/29 18:09:30 guenther Exp $ */
 
 /*
  * Copyright (c) 2007 David Crawshaw <david@zentus.com>
@@ -653,7 +653,7 @@ out:
 }
 
 #define BACKDOOR_OP_I386(op, frame)		\
-	__asm__ __volatile__ (			\
+	__asm__ volatile (			\
 		"pushal;"			\
 		"pushl %%eax;"			\
 		"movl 0x18(%%eax), %%ebp;"	\
@@ -677,7 +677,7 @@ out:
 	)
 
 #define BACKDOOR_OP_AMD64(op, frame)		\
-	__asm__ __volatile__ (			\
+	__asm__ volatile (			\
 		"pushq %%rbp;			\n\t" \
 		"pushq %%rax;			\n\t" \
 		"movq 0x30(%%rax), %%rbp;	\n\t" \
diff --git a/sys/dev/x86emu/x86emu.c b/sys/dev/x86emu/x86emu.c
index 98333509a81..2ab27ab4d72 100644
--- a/sys/dev/x86emu/x86emu.c
+++ b/sys/dev/x86emu/x86emu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: x86emu.c,v 1.5 2010/02/17 15:09:47 pirofti Exp $	*/
+/*	$OpenBSD: x86emu.c,v 1.6 2014/03/29 18:09:31 guenther Exp $	*/
 /*	$NetBSD: x86emu.c,v 1.7 2009/02/03 19:26:29 joerg Exp $	*/
 
 /*
@@ -5246,7 +5246,7 @@ x86emuOp2_pop_FS(struct x86emu *emu)
 static void
 hw_cpuid(uint32_t *a, uint32_t *b, uint32_t *c, uint32_t *d)
 {
-	__asm__ __volatile__("cpuid"
+	__asm__ volatile("cpuid"
 			     : "=a" (*a), "=b" (*b),
 			       "=c" (*c), "=d" (*d)
 			     : "a" (*a), "c" (*c)
diff --git a/sys/kern/init_main.c b/sys/kern/init_main.c
index afb0284a2b8..a80576c7459 100644
--- a/sys/kern/init_main.c
+++ b/sys/kern/init_main.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: init_main.c,v 1.207 2014/03/28 17:57:11 mpi Exp $	*/
+/*	$OpenBSD: init_main.c,v 1.208 2014/03/29 18:09:31 guenther Exp $	*/
 /*	$NetBSD: init_main.c,v 1.84.4.1 1996/06/02 09:08:06 mrg Exp $	*/
 
 /*
@@ -129,7 +129,7 @@ int	boothowto;
 struct	timespec boottime;
 int	ncpus =  1;
 int	ncpusfound = 1;			/* number of cpus we find */
-__volatile int start_init_exec;		/* semaphore for start_init() */
+volatile int start_init_exec;		/* semaphore for start_init() */
 
 #if !defined(NO_PROPOLICE)
 long	__guard_local __attribute__((section(".openbsd.randomdata")));
diff --git a/sys/kern/subr_autoconf.c b/sys/kern/subr_autoconf.c
index 390dee9ca8b..e3236b12e73 100644
--- a/sys/kern/subr_autoconf.c
+++ b/sys/kern/subr_autoconf.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: subr_autoconf.c,v 1.74 2014/03/13 03:52:56 dlg Exp $	*/
+/*	$OpenBSD: subr_autoconf.c,v 1.75 2014/03/29 18:09:31 guenther Exp $	*/
 /*	$NetBSD: subr_autoconf.c,v 1.21 1996/04/04 06:06:18 cgd Exp $	*/
 
 /*
@@ -93,7 +93,7 @@ void config_process_deferred_children(struct device *);
 
 struct devicelist alldevs;		/* list of all devices */
 
-__volatile int config_pending;		/* semaphore for mountroot */
+volatile int config_pending;		/* semaphore for mountroot */
 
 struct mutex autoconf_attdet_mtx = MUTEX_INITIALIZER(IPL_HIGH);
 /*
diff --git a/sys/sys/device.h b/sys/sys/device.h
index 0758e40a877..9f1b57b2969 100644
--- a/sys/sys/device.h
+++ b/sys/sys/device.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: device.h,v 1.48 2014/03/13 03:52:56 dlg Exp $	*/
+/*	$OpenBSD: device.h,v 1.49 2014/03/29 18:09:31 guenther Exp $	*/
 /*	$NetBSD: device.h,v 1.15 1996/04/09 20:55:24 cgd Exp $	*/
 
 /*
@@ -167,7 +167,7 @@ struct pdevinit {
 extern struct devicelist alldevs;	/* list of all devices */
 
 extern int autoconf_verbose;
-extern __volatile int config_pending;	/* semaphore for mountroot */
+extern volatile int config_pending;	/* semaphore for mountroot */
 
 void config_init(void);
 void *config_search(cfmatch_t, struct device *, void *);
diff --git a/sys/sys/proc.h b/sys/sys/proc.h
index e6f4071719b..3f7afbf84db 100644
--- a/sys/sys/proc.h
+++ b/sys/sys/proc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: proc.h,v 1.180 2014/03/27 04:12:28 guenther Exp $	*/
+/*	$OpenBSD: proc.h,v 1.181 2014/03/29 18:09:31 guenther Exp $	*/
 /*	$NetBSD: proc.h,v 1.44 1996/04/22 01:23:21 christos Exp $	*/
 
 /*-
@@ -292,7 +292,7 @@ struct proc {
 	u_int	p_uticks;		/* Statclock hits in user mode. */
 	u_int	p_sticks;		/* Statclock hits in system mode. */
 	u_int	p_iticks;		/* Statclock hits processing intr. */
-	struct	cpu_info * __volatile p_cpu; /* CPU we're running on. */
+	struct	cpu_info * volatile p_cpu; /* CPU we're running on. */
 
 	struct	rusage p_ru;		/* Statistics */
 	struct	tusage p_tu;		/* accumulated times. */
diff --git a/sys/sys/rwlock.h b/sys/sys/rwlock.h
index e515b68728e..0fa11f6780f 100644
--- a/sys/sys/rwlock.h
+++ b/sys/sys/rwlock.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rwlock.h,v 1.14 2013/05/01 17:13:05 tedu Exp $	*/
+/*	$OpenBSD: rwlock.h,v 1.15 2014/03/29 18:09:31 guenther Exp $	*/
 /*
  * Copyright (c) 2002 Artur Grabowski <art@openbsd.org>
  *
@@ -62,7 +62,7 @@
 struct proc;
 
 struct rwlock {
-	__volatile unsigned long rwl_owner;
+	volatile unsigned long rwl_owner;
 	const char *rwl_name;
 };
 
diff --git a/sys/sys/sched.h b/sys/sys/sched.h
index 1e3142777e9..10223323822 100644
--- a/sys/sys/sched.h
+++ b/sys/sys/sched.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sched.h,v 1.34 2014/01/30 20:14:27 miod Exp $	*/
+/*	$OpenBSD: sched.h,v 1.35 2014/03/29 18:09:31 guenther Exp $	*/
 /* $NetBSD: sched.h,v 1.2 1999/02/28 18:14:58 ross Exp $ */
 
 /*-
@@ -95,7 +95,7 @@
  */
 struct schedstate_percpu {
 	struct timespec spc_runtime;	/* time curproc started running */
-	__volatile int spc_schedflags;	/* flags; see below */
+	volatile int spc_schedflags;	/* flags; see below */
 	u_int spc_schedticks;		/* ticks for schedclock() */
 	u_int64_t spc_cp_time[CPUSTATES]; /* CPU state statistics */
 	u_char spc_curpriority;		/* usrpri of curproc */