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author | 2019-11-13 06:38:40 +0000 | |
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committer | 2019-11-13 06:38:40 +0000 | |
commit | 2ed1186f46a93e045af1279f71fd1e15181eac98 (patch) | |
tree | c85bb9b8db0d4bc6129bf985d1df0552e03eed1d | |
parent | drm/i915/cmdparser: Ignore Length operands during command matching (diff) | |
download | wireguard-openbsd-2ed1186f46a93e045af1279f71fd1e15181eac98.tar.xz wireguard-openbsd-2ed1186f46a93e045af1279f71fd1e15181eac98.zip |
drm/i915: Lower RM timeout to avoid DSI hard hangs
From Uma Shankar
011b7173cbdbd1a5f1826656693ea51516f15dc1 in linux 4.19.y/4.19.84
1d85a299c4db57c55e0229615132c964d17aa765 in mainline linux
-rw-r--r-- | sys/dev/pci/drm/i915/i915_reg.h | 4 | ||||
-rw-r--r-- | sys/dev/pci/drm/i915/intel_pm.c | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/i915/i915_reg.h b/sys/dev/pci/drm/i915/i915_reg.h index af9ef5116ac..ce8396cc16f 100644 --- a/sys/dev/pci/drm/i915/i915_reg.h +++ b/sys/dev/pci/drm/i915/i915_reg.h @@ -7009,6 +7009,10 @@ enum { #define SKL_CSR_DC5_DC6_COUNT _MMIO(0x8002C) #define BXT_CSR_DC3_DC5_COUNT _MMIO(0x80038) +/* Display Internal Timeout Register */ +#define RM_TIMEOUT _MMIO(0x42060) +#define MMIO_TIMEOUT_US(us) ((us) << 0) + /* interrupts */ #define DE_MASTER_IRQ_CONTROL (1 << 31) #define DE_SPRITEB_FLIP_DONE (1 << 29) diff --git a/sys/dev/pci/drm/i915/intel_pm.c b/sys/dev/pci/drm/i915/intel_pm.c index 5bca1557a01..6544673cfce 100644 --- a/sys/dev/pci/drm/i915/intel_pm.c +++ b/sys/dev/pci/drm/i915/intel_pm.c @@ -116,6 +116,14 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) */ I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) | PWM1_GATING_DIS | PWM2_GATING_DIS); + + /* + * Lower the display internal timeout. + * This is needed to avoid any hard hangs when DSI port PLL + * is off and a MMIO access is attempted by any privilege + * application, using batch buffers or any other means. + */ + I915_WRITE(RM_TIMEOUT, MMIO_TIMEOUT_US(950)); } static void glk_init_clock_gating(struct drm_i915_private *dev_priv) |