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| author |   kettenis <kettenis@openbsd.org> | 2020-05-18 10:40:38 +0000 |
|---|---|---|
| committer | kettenis <kettenis@openbsd.org> | 2020-05-18 10:40:38 +0000 |
| commit | 321fe8e0e06e7b795b85f8039ed81a4d56dba135 (patch) | |
| tree | 7023996f816cec83f5b5c083e139cb4918722070 | |
| parent | Enable amlpwrc(4). (diff) | |
| download | wireguard-openbsd-321fe8e0e06e7b795b85f8039ed81a4d56dba135.tar.xz wireguard-openbsd-321fe8e0e06e7b795b85f8039ed81a4d56dba135.zip | |
Add some comments.
| -rw-r--r-- | sys/dev/fdt/amlclock.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sys/dev/fdt/amlclock.c b/sys/dev/fdt/amlclock.c index a644de45946..9bf7978c280 100644 --- a/sys/dev/fdt/amlclock.c +++ b/sys/dev/fdt/amlclock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: amlclock.c,v 1.10 2020/05/17 22:11:50 kettenis Exp $ */ +/* $OpenBSD: amlclock.c,v 1.11 2020/05/18 10:40:38 kettenis Exp $ */ /* * Copyright (c) 2019 Mark Kettenis <kettenis@openbsd.org> * @@ -28,6 +28,7 @@ #include <dev/ofw/ofw_misc.h> #include <dev/ofw/fdt.h> +/* Clock IDs */ #define G12A_SYS_PLL 0 #define G12A_FCLK_DIV2 2 #define G12A_FCLK_DIV3 3 @@ -51,6 +52,7 @@ #define G12B_SYS1_PLL 214 #define G12B_CPUB_CLK 224 +/* Registers */ #define HHI_PCIE_PLL_CNTL0 0x26 #define HHI_PCIE_PLL_CNTL1 0x27 #define HHI_PCIE_PLL_CNTL2 0x28 |