Unconditionnaly disable the instruction cache on 40MHz MVME197LE boards,

so that they run stably. Definitely overkill and causing a severe performance
hit (they now run about as fast as a 25MHz board with I$ enabled would), but
sometimes you can't fight silicon bugs.

Other boards (i.e. 50MHz ones) are not affected.

3 files changed, 30 insertions, 7 deletions

diff --git a/sys/arch/mvme88k/mvme88k/m197_machdep.c b/sys/arch/mvme88k/mvme88k/m197_machdep.c
index 538789b41c9..316c7e8ac61 100644
--- a/sys/arch/mvme88k/mvme88k/m197_machdep.c
+++ b/sys/arch/mvme88k/mvme88k/m197_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m197_machdep.c,v 1.21 2007/12/15 19:34:35 miod Exp $	*/
+/*	$OpenBSD: m197_machdep.c,v 1.22 2007/12/15 19:37:41 miod Exp $	*/
 /*
  * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -318,6 +318,7 @@ m197_bootstrap()
 {
 	extern struct cmmu_p cmmu88110;
 	extern struct cmmu_p cmmu88410;
+	extern int cpuspeed;
 	u_int16_t cpu;
 
 	if (mc88410_present()) {
@@ -336,6 +337,12 @@ m197_bootstrap()
 	} else
 		cmmu = &cmmu88110;	/* 197LE */
 
+	/*
+	 * Find out the processor speed, from the BusSwitch prescaler
+	 * adjust register.
+	 */
+	cpuspeed = 256 - *(volatile u_int8_t *)(BS_BASE + BS_PADJUST);
+
 	md_interrupt_func_ptr = m197_ext_int;
 	md_getipl = m197_getipl;
 	md_setipl = m197_setipl;
diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c
index 1942743042e..9fb5de38a43 100644
--- a/sys/arch/mvme88k/mvme88k/m88110.c
+++ b/sys/arch/mvme88k/mvme88k/m88110.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88110.c,v 1.51 2007/12/15 19:34:35 miod Exp $	*/
+/*	$OpenBSD: m88110.c,v 1.52 2007/12/15 19:37:41 miod Exp $	*/
 /*
  * Copyright (c) 1998 Steve Murphree, Jr.
  * All rights reserved.
@@ -249,6 +249,7 @@ m88110_cpu_number(void)
 void
 m88110_initialize_cpu(cpuid_t cpu)
 {
+	extern int cpuspeed;
 	u_int ictl, dctl;
 	int i;
 
@@ -273,6 +274,23 @@ m88110_initialize_cpu(cpuid_t cpu)
 	ictl = BATC_512K | CMMU_ICTL_DID | CMMU_ICTL_CEN | CMMU_ICTL_BEN;
 
 	/*
+	 * 40MHz MVME197LE boards need to run with their instruction cache
+	 * disabled, otherwise they get random bus errors and the kernel
+	 * eventually freezes. Unfortunately this makes them perform at
+	 * about the speed of a fictitious 25MHz board with I$ enabled.
+	 *
+	 * This happens with version 4 and version 5 processors (reporting
+	 * themselves as version 0xb and 0xf in dmesg) and BusSwitch
+	 * revision 1. However, 50MHz boards with the same BusSwitch
+	 * revision work nicely.
+	 *
+	 * (There is probably a better way to work around this problem,
+	 *  but I am not aware of it -- miod)
+	 */
+	if (cpuspeed == 40)
+		ictl &= ~CMMU_ICTL_CEN;
+
+	/*
 	 * 88110 errata #10 (4.2) or #2 (5.1.1):
 	 * ``Under some circumstances, the 88110 may incorrectly latch data
 	 *   as it comes from the bus.
diff --git a/sys/arch/mvme88k/mvme88k/machdep.c b/sys/arch/mvme88k/mvme88k/machdep.c
index 1ed3cc720e7..19359f15880 100644
--- a/sys/arch/mvme88k/mvme88k/machdep.c
+++ b/sys/arch/mvme88k/mvme88k/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.204 2007/12/15 19:35:54 miod Exp $	*/
+/* $OpenBSD: machdep.c,v 1.205 2007/12/15 19:37:41 miod Exp $	*/
 /*
  * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -255,10 +255,8 @@ getcpuspeed(struct mvmeprom_brdid *brdid)
 #endif
 #ifdef MVME197
 	case BRD_197:
-		if (speed == 40 || speed == 50)
-			return speed;
-		speed = 50;
-		break;
+		/* we already computed the speed in m197_bootstrap() */
+		return cpuspeed;
 #endif
 	}