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author | 2020-07-23 10:43:10 +0000 | |
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committer | 2020-07-23 10:43:10 +0000 | |
commit | 473d62af1dcb18567e870146fe3cc3a0f4682a51 (patch) | |
tree | 781cb687991c7fb7366e3055f3a94897bb79d0bd | |
parent | drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode (diff) | |
download | wireguard-openbsd-473d62af1dcb18567e870146fe3cc3a0f4682a51.tar.xz wireguard-openbsd-473d62af1dcb18567e870146fe3cc3a0f4682a51.zip |
drm/amdgpu/sdma5: fix wptr overwritten in ->get_wptr()
From Xiaojie Yuan
7c7df36732772d4f68e0ed50667ced18440bb2ad in linux 5.7.y/5.7.10
05051496b2622e4d12e2036b35165969aa502f89 in mainline linux
-rw-r--r-- | sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c b/sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c index 74419ff6896..0547b68c738 100644 --- a/sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c +++ b/sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c @@ -286,30 +286,20 @@ static uint64_t sdma_v5_0_ring_get_rptr(struct amdgpu_ring *ring) static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring) { struct amdgpu_device *adev = ring->adev; - u64 *wptr = NULL; - uint64_t local_wptr = 0; + u64 wptr; if (ring->use_doorbell) { /* XXX check if swapping is necessary on BE */ - wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]); - DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr); - *wptr = (*wptr) >> 2; - DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr); + wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs])); + DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); } else { - u32 lowbit, highbit; - - wptr = &local_wptr; - lowbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)) >> 2; - highbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2; - - DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n", - ring->me, highbit, lowbit); - *wptr = highbit; - *wptr = (*wptr) << 32; - *wptr |= lowbit; + wptr = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)); + wptr = wptr << 32; + wptr |= RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)); + DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); } - return *wptr; + return wptr >> 2; } /** |