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authorart <art@openbsd.org>1999-04-22 18:43:50 +0000
committerart <art@openbsd.org>1999-04-22 18:43:50 +0000
commit545051bfabbf793dc8dc25bd0ab87bffb7ba4b86 (patch)
treed07494f41bc291e0040e2a500bed80ded3a2a28a
parentconstants for UVM (diff)
downloadwireguard-openbsd-545051bfabbf793dc8dc25bd0ab87bffb7ba4b86.tar.xz
wireguard-openbsd-545051bfabbf793dc8dc25bd0ab87bffb7ba4b86.zip
UVM fixes, cnt -> uvmexp
-rw-r--r--sys/arch/sparc/sparc/amd7930intr.s10
-rw-r--r--sys/arch/sparc/sparc/bsd_fdintr.s9
-rw-r--r--sys/arch/sparc/sparc/locore.s40
-rw-r--r--sys/arch/sparc/sparc/trap.c18
4 files changed, 71 insertions, 6 deletions
diff --git a/sys/arch/sparc/sparc/amd7930intr.s b/sys/arch/sparc/sparc/amd7930intr.s
index 295b72184c4..69a121fbd26 100644
--- a/sys/arch/sparc/sparc/amd7930intr.s
+++ b/sys/arch/sparc/sparc/amd7930intr.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: amd7930intr.s,v 1.3 1997/09/17 06:47:15 downsj Exp $ */
+/* $OpenBSD: amd7930intr.s,v 1.4 1999/04/22 18:43:50 art Exp $ */
/* $NetBSD: amd7930intr.s,v 1.10 1997/03/11 01:03:07 pk Exp $ */
/*
* Copyright (c) 1995 Rolf Grossmann.
@@ -100,11 +100,17 @@ _amd7930_trap:
st %l2, [%l7 + %lo(savepc)]
! tally interrupt
+#if defined(UVM)
+ sethi %hi(_uvmexp+V_INTR), %l7
+ ld [%l7 + %lo(_uvmexp+V_INTR)], %l6
+ inc %l6
+ st %l6, [%l7 + %lo(_uvmexp+V_INTR)]
+#else
sethi %hi(_cnt+V_INTR), %l7
ld [%l7 + %lo(_cnt+V_INTR)], %l6
inc %l6
st %l6, [%l7 + %lo(_cnt+V_INTR)]
-
+#endif
sethi %hi(_auiop), %l7
ld [%l7 + %lo(_auiop)], %l7
diff --git a/sys/arch/sparc/sparc/bsd_fdintr.s b/sys/arch/sparc/sparc/bsd_fdintr.s
index fca43afc9fc..c99cd3f6acd 100644
--- a/sys/arch/sparc/sparc/bsd_fdintr.s
+++ b/sys/arch/sparc/sparc/bsd_fdintr.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: bsd_fdintr.s,v 1.4 1997/08/25 08:38:47 downsj Exp $ */
+/* $OpenBSD: bsd_fdintr.s,v 1.5 1999/04/22 18:43:51 art Exp $ */
/* $NetBSD: bsd_fdintr.s,v 1.11 1997/04/07 21:00:36 pk Exp $ */
/*
@@ -168,10 +168,17 @@ _fdchwintr:
st %l2, [%l7 + 8]
! tally interrupt
+#if defined(UVM)
+ sethi %hi(_uvmexp+V_INTR), %l7
+ ld [%l7 + %lo(_uvmexp+V_INTR)], %l6
+ inc %l6
+ st %l6, [%l7 + %lo(_uvmexp+V_INTR)]
+#else
sethi %hi(_cnt+V_INTR), %l7
ld [%l7 + %lo(_cnt+V_INTR)], %l6
inc %l6
st %l6, [%l7 + %lo(_cnt+V_INTR)]
+#endif
! load fdc, if it's NULL there's nothing to do: schedule soft interrupt
sethi %hi(_fdciop), %l7
diff --git a/sys/arch/sparc/sparc/locore.s b/sys/arch/sparc/sparc/locore.s
index 36c6d96b9e7..ffcea8e4091 100644
--- a/sys/arch/sparc/sparc/locore.s
+++ b/sys/arch/sparc/sparc/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.23 1999/03/24 17:53:22 deraadt Exp $ */
+/* $OpenBSD: locore.s,v 1.24 1999/04/22 18:43:51 art Exp $ */
/* $NetBSD: locore.s,v 1.73 1997/09/13 20:36:48 pk Exp $ */
/*
@@ -1699,7 +1699,11 @@ ctw_invalid:
#if defined(SUN4)
memfault_sun4:
TRAP_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_FAULTS)
+#else
INCR(_cnt+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
+#endif
st %g1, [%sp + CCFSZ + 20] ! save g1
rd %y, %l4 ! save y
@@ -1764,8 +1768,12 @@ memfault_sun4:
memfault_sun4c:
#if defined(SUN4C)
TRAP_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
+#else
INCR(_cnt+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
-
+#endif
+
st %g1, [%sp + CCFSZ + 20] ! save g1
rd %y, %l4 ! save y
@@ -1863,7 +1871,11 @@ memfault_sun4c:
#if defined(SUN4M)
memfault_sun4m:
TRAP_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
+#else
INCR(_cnt+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
+#endif
st %g1, [%sp + CCFSZ + 20] ! save g1
rd %y, %l4 ! save y
@@ -2311,7 +2323,11 @@ softintr_sun44c:
softintr_common:
INTR_SETUP(-CCFSZ-80)
std %g2, [%sp + CCFSZ + 24] ! save registers
+#if defined(UVM)
+ INCR(_uvmexp+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#else
INCR(_cnt+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#endif
mov %g1, %l7
rd %y, %l6
std %g4, [%sp + CCFSZ + 32]
@@ -2379,7 +2395,11 @@ _sparc_interrupt44c:
_sparc_interrupt_common:
INTR_SETUP(-CCFSZ-80)
std %g2, [%sp + CCFSZ + 24] ! save registers
+#if defined(UVM)
+ INCR(_uvmexp+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#else
INCR(_cnt+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#endif
mov %g1, %l7
rd %y, %l6
std %g4, [%sp + CCFSZ + 32]
@@ -2467,7 +2487,11 @@ zshard:
#if defined(SUN4)
nmi_sun4:
INTR_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#else
INCR(_cnt+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#endif
/*
* Level 15 interrupts are nonmaskable, so with traps off,
* disable all interrupts to prevent recursion.
@@ -2493,7 +2517,11 @@ nmi_sun4:
#if defined(SUN4C)
nmi_sun4c:
INTR_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#else
INCR(_cnt+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#endif
/*
* Level 15 interrupts are nonmaskable, so with traps off,
* disable all interrupts to prevent recursion.
@@ -2548,7 +2576,11 @@ nmi_common:
#if defined(SUN4M)
nmi_sun4m:
INTR_SETUP(-CCFSZ-80)
+#if defined(UVM)
+ INCR(_uvmexp+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#else
INCR(_cnt+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
+#endif
/*
* Level 15 interrupts are nonmaskable, so with traps off,
* disable all interrupts to prevent recursion.
@@ -4340,7 +4372,11 @@ ENTRY(switchexit)
*/
INCR(_nswitchexit) ! nswitchexit++;
+#if defined(UVM)
+ INCR(_uvmexp+V_SWTCH) ! cnt.v_switch++;
+#else
INCR(_cnt+V_SWTCH) ! cnt.v_switch++;
+#endif
mov PSR_S|PSR_ET, %g1 ! oldpsr = PSR_S | PSR_ET;
sethi %hi(_whichqs), %g2
diff --git a/sys/arch/sparc/sparc/trap.c b/sys/arch/sparc/sparc/trap.c
index 35649db2314..94dfffd6332 100644
--- a/sys/arch/sparc/sparc/trap.c
+++ b/sys/arch/sparc/sparc/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.14 1998/05/11 05:42:31 deraadt Exp $ */
+/* $OpenBSD: trap.c,v 1.15 1999/04/22 18:43:53 art Exp $ */
/* $NetBSD: trap.c,v 1.58 1997/09/12 08:55:01 pk Exp $ */
/*
@@ -290,7 +290,11 @@ trap(type, psr, pc, tf)
/* This steps the PC over the trap. */
#define ADVANCE (n = tf->tf_npc, tf->tf_pc = n, tf->tf_npc = n + 4)
+#if defined(UVM)
+ uvmexp.traps++;
+#else
cnt.v_trap++;
+#endif
/*
* Generally, kernel traps cause a panic. Any exceptions are
* handled early here.
@@ -664,7 +668,11 @@ mem_access_fault(type, ser, v, pc, psr, tf)
u_quad_t sticks;
union sigval sv;
+#if defined(UVM)
+ uvmexp.traps++;
+#else
cnt.v_trap++;
+#endif
if ((p = curproc) == NULL) /* safety check */
p = &proc0;
sticks = p->p_sticks;
@@ -816,7 +824,11 @@ mem_access_fault4m(type, sfsr, sfva, afsr, afva, tf)
u_quad_t sticks;
union sigval sv;
+#if defined(UVM)
+ uvmexp.traps++;
+#else
cnt.v_trap++;
+#endif
if ((p = curproc) == NULL) /* safety check */
p = &proc0;
sticks = p->p_sticks;
@@ -1036,7 +1048,11 @@ syscall(code, tf, pc)
extern struct pcb *cpcb;
#endif
+#if defined(UVM)
+ uvmexp.syscalls++;
+#else
cnt.v_syscall++;
+#endif
p = curproc;
#ifdef DIAGNOSTIC
if (tf->tf_psr & PSR_PS)