Use macros for Config1 bits.

4 files changed, 41 insertions, 12 deletions

diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c
index ceb1d6c2f40..74aeb1a6da3 100644
--- a/sys/arch/loongson/loongson/machdep.c
+++ b/sys/arch/loongson/loongson/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.79 2017/07/12 06:26:33 natano Exp $ */
+/*	$OpenBSD: machdep.c,v 1.80 2017/08/26 13:53:46 visa Exp $ */
 
 /*
  * Copyright (c) 2009, 2010, 2014 Miodrag Vallat.
@@ -763,7 +763,8 @@ mips_init(uint64_t argc, uint64_t argv, uint64_t envp, uint64_t cv,
 #ifdef CPU_LOONGSON3
 	case 0x3a:
 		bootcpu_hwinfo.tlbsize =
-		    1 + ((cp0_get_config_1() >> 25) & 0x3f);
+		    1 + ((cp0_get_config_1() & CONFIG1_MMUSize1) >>
+		    CONFIG1_MMUSize1_SHIFT);
 		Loongson3_ConfigCache(curcpu());
 		Loongson3_SyncCache(curcpu());
 		break;
diff --git a/sys/arch/mips64/include/mips_cpu.h b/sys/arch/mips64/include/mips_cpu.h
index 94cb0c6234a..33afa4df332 100644
--- a/sys/arch/mips64/include/mips_cpu.h
+++ b/sys/arch/mips64/include/mips_cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mips_cpu.h,v 1.6 2017/06/11 03:35:30 visa Exp $	*/
+/*	$OpenBSD: mips_cpu.h,v 1.7 2017/08/26 13:53:46 visa Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -293,6 +293,32 @@
 #define	FPC_CSR			$31
 
 /*
+ * Config1 register
+ */
+#define	CONFIG1_M		0x80000000u
+#define	CONFIG1_MMUSize1	0x7e000000u
+#define	CONFIG1_MMUSize1_SHIFT	25
+#define	CONFIG1_IS		0x01c00000u
+#define	CONFIG1_IS_SHIFT	22
+#define	CONFIG1_IL		0x00380000u
+#define	CONFIG1_IL_SHIFT	19
+#define	CONFIG1_IA		0x00070000u
+#define	CONFIG1_IA_SHIFT	16
+#define	CONFIG1_DS		0x0000e000u
+#define	CONFIG1_DS_SHIFT	13
+#define	CONFIG1_DL		0x00001c00u
+#define	CONFIG1_DL_SHIFT	10
+#define	CONFIG1_DA		0x00000380u
+#define	CONFIG1_DA_SHIFT	7
+#define	CONFIG1_C2		0x00000040u
+#define	CONFIG1_MD		0x00000020u
+#define	CONFIG1_PC		0x00000010u
+#define	CONFIG1_WR		0x00000008u
+#define	CONFIG1_CA		0x00000004u
+#define	CONFIG1_EP		0x00000002u
+#define	CONFIG1_FP		0x00000001u
+
+/*
  * Config3 register
  */
 #define	CONFIG3_M		0x80000000
diff --git a/sys/arch/mips64/mips64/cache_mips64r2.c b/sys/arch/mips64/mips64/cache_mips64r2.c
index 5f1cfe55e74..c8d699b9091 100644
--- a/sys/arch/mips64/mips64/cache_mips64r2.c
+++ b/sys/arch/mips64/mips64/cache_mips64r2.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_mips64r2.c,v 1.2 2016/01/05 05:27:54 visa Exp $	*/
+/*	$OpenBSD: cache_mips64r2.c,v 1.3 2017/08/26 13:53:46 visa Exp $	*/
 
 /*
  * Copyright (c) 2014 Miodrag Vallat.
@@ -24,6 +24,7 @@
 #include <sys/systm.h>
 
 #include <mips64/cache.h>
+#include <mips64/mips_cpu.h>
 #include <machine/cpu.h>
 
 #include <uvm/uvm_extern.h>
@@ -64,17 +65,17 @@ mips64r2_ConfigCache(struct cpu_info *ci)
 
 	cfg = cp0_get_config_1();
 
-	a = 1 + ((cfg >> 7) & 0x07);
-	l = (cfg >> 10) & 0x07;
-	s = (cfg >> 13) & 0x07;
+	a = 1 + ((cfg & CONFIG1_DA) >> CONFIG1_DA_SHIFT);
+	l = (cfg & CONFIG1_DL) >> CONFIG1_DL_SHIFT;
+	s = (cfg & CONFIG1_DS) >> CONFIG1_DS_SHIFT;
 	ci->ci_l1data.linesize = 2 << l;
 	ci->ci_l1data.setsize = (64 << s) * ci->ci_l1data.linesize;
 	ci->ci_l1data.sets = a;
 	ci->ci_l1data.size = ci->ci_l1data.sets * ci->ci_l1data.setsize;
 
-	a = 1 + ((cfg >> 16) & 0x07);
-	l = (cfg >> 19) & 0x07;
-	s = (cfg >> 22) & 0x07;
+	a = 1 + ((cfg & CONFIG1_IA) >> CONFIG1_IA_SHIFT);
+	l = (cfg & CONFIG1_IL) >> CONFIG1_IL_SHIFT;
+	s = (cfg & CONFIG1_IS) >> CONFIG1_IS_SHIFT;
 	ci->ci_l1inst.linesize = 2 << l;
 	ci->ci_l1inst.setsize = (64 << s) * ci->ci_l1inst.linesize;
 	ci->ci_l1inst.sets = a;
diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c
index d081b7e710a..933152eb662 100644
--- a/sys/arch/octeon/octeon/machdep.c
+++ b/sys/arch/octeon/octeon/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.97 2017/07/31 14:53:56 visa Exp $ */
+/*	$OpenBSD: machdep.c,v 1.98 2017/08/26 13:53:46 visa Exp $ */
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -350,7 +350,8 @@ mips_init(register_t a0, register_t a1, register_t a2, register_t a3)
 	bootcpu_hwinfo.type = (prid >> 8) & 0xff;
 	bootcpu_hwinfo.c1prid = 0;	/* No FPU */
 
-	bootcpu_hwinfo.tlbsize = 1 + ((cp0_get_config_1() >> 25) & 0x3f);
+	bootcpu_hwinfo.tlbsize = 1 + ((cp0_get_config_1() & CONFIG1_MMUSize1)
+	    >> CONFIG1_MMUSize1_SHIFT);
 	if (cp0_get_config_3() & CONFIG3_M) {
 		config4 = cp0_get_config_4();
 		if (((config4 & CONFIG4_MMUExtDef) >>