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authorjsg <jsg@openbsd.org>2017-03-22 07:21:39 +0000
committerjsg <jsg@openbsd.org>2017-03-22 07:21:39 +0000
commit5cfaa52ff699400f3f394ab1afa3c8031291296f (patch)
treeb68254014d9f7f1e94d706af936f0648ab00cef9
parentAdd support for the strikethrough attribute (SGR 9), using the new smxx (diff)
downloadwireguard-openbsd-5cfaa52ff699400f3f394ab1afa3c8031291296f.tar.xz
wireguard-openbsd-5cfaa52ff699400f3f394ab1afa3c8031291296f.zip
Add some more PCI classes and subclasses. Checked against EDK2 as
"PCI Code and ID Assignment Specification" is only available for those willing to pay thousands of dollars for PDFs. Prompted by a dmesg from an AMD Zen system which uses class 0x13 (Non-Essential Instrumentation) and System subclass 0x06 (IOMMU). There is currently no public documentation for AMD family 17h to reference to see if this is sane. ok kettenis@ on an earlier version
-rw-r--r--sys/dev/pci/pci_subr.c11
-rw-r--r--sys/dev/pci/pcireg.h9
2 files changed, 18 insertions, 2 deletions
diff --git a/sys/dev/pci/pci_subr.c b/sys/dev/pci/pci_subr.c
index d6010180b87..b9fac31b422 100644
--- a/sys/dev/pci/pci_subr.c
+++ b/sys/dev/pci/pci_subr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pci_subr.c,v 1.21 2007/02/21 13:08:22 dlg Exp $ */
+/* $OpenBSD: pci_subr.c,v 1.22 2017/03/22 07:21:39 jsg Exp $ */
/* $NetBSD: pci_subr.c,v 1.19 1996/10/13 01:38:29 christos Exp $ */
/*
@@ -73,6 +73,7 @@ const struct pci_class pci_subclass_mass_storage[] = {
{ "ATA", PCI_SUBCLASS_MASS_STORAGE_ATA, },
{ "SATA", PCI_SUBCLASS_MASS_STORAGE_SATA, },
{ "SAS", PCI_SUBCLASS_MASS_STORAGE_SAS, },
+ { "UFS", PCI_SUBCLASS_MASS_STORAGE_UFS, },
{ "miscellaneous", PCI_SUBCLASS_MASS_STORAGE_MISC, },
{ 0 },
};
@@ -85,6 +86,7 @@ const struct pci_class pci_subclass_network[] = {
{ "ISDN", PCI_SUBCLASS_NETWORK_ISDN, },
{ "WorldFip", PCI_SUBCLASS_NETWORK_WORLDFIP, },
{ "PCMIG Multi Computing", PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP, },
+ { "InfiniBand", PCI_SUBCLASS_NETWORK_INFINIBAND, },
{ "miscellaneous", PCI_SUBCLASS_NETWORK_MISC, },
{ 0 },
};
@@ -126,6 +128,7 @@ const struct pci_class pci_subclass_bridge[] = {
{ "Semi-transparent PCI", PCI_SUBCLASS_BRIDGE_STPCI, },
{ "InfiniBand", PCI_SUBCLASS_BRIDGE_INFINIBAND, },
{ "miscellaneous", PCI_SUBCLASS_BRIDGE_MISC, },
+ { "advanced switching", PCI_SUBCLASS_BRIDGE_AS, },
{ 0 },
};
@@ -147,6 +150,8 @@ const struct pci_class pci_subclass_system[] = {
{ "RTC", PCI_SUBCLASS_SYSTEM_RTC, },
{ "PCI Hot-Plug", PCI_SUBCLASS_SYSTEM_PCIHOTPLUG, },
{ "SD Host Controller", PCI_SUBCLASS_SYSTEM_SDHC, },
+ { "IOMMU", PCI_SUBCLASS_SYSTEM_IOMMU, },
+ { "root complex event", PCI_SUBCLASS_SYSTEM_ROOTCOMPEVENT, },
{ "miscellaneous", PCI_SUBCLASS_SYSTEM_MISC, },
{ 0 },
};
@@ -271,6 +276,10 @@ const struct pci_class pci_class[] = {
pci_subclass_crypto, },
{ "DASP", PCI_CLASS_DASP,
pci_subclass_dasp, },
+ { "accelerator", PCI_CLASS_ACCELERATOR,
+ NULL, },
+ { "instrumentation", PCI_CLASS_INSTRUMENTATION,
+ NULL, },
{ "undefined", PCI_CLASS_UNDEFINED,
0, },
{ 0 },
diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h
index 3cc1775d396..9676ad44a2d 100644
--- a/sys/dev/pci/pcireg.h
+++ b/sys/dev/pci/pcireg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pcireg.h,v 1.51 2017/03/16 22:05:44 deraadt Exp $ */
+/* $OpenBSD: pcireg.h,v 1.52 2017/03/22 07:21:39 jsg Exp $ */
/* $NetBSD: pcireg.h,v 1.26 2000/05/10 16:58:42 thorpej Exp $ */
/*
@@ -152,6 +152,8 @@ typedef u_int8_t pci_revision_t;
#define PCI_CLASS_SATCOM 0x0f
#define PCI_CLASS_CRYPTO 0x10
#define PCI_CLASS_DASP 0x11
+#define PCI_CLASS_ACCELERATOR 0x12
+#define PCI_CLASS_INSTRUMENTATION 0x13
#define PCI_CLASS_UNDEFINED 0xff
/* 0x00 prehistoric subclasses */
@@ -168,6 +170,7 @@ typedef u_int8_t pci_revision_t;
#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06
#define PCI_SUBCLASS_MASS_STORAGE_SAS 0x07
#define PCI_SUBCLASS_MASS_STORAGE_NVM 0x08
+#define PCI_SUBCLASS_MASS_STORAGE_UFS 0x09
#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80
/* 0x02 network subclasses */
@@ -178,6 +181,7 @@ typedef u_int8_t pci_revision_t;
#define PCI_SUBCLASS_NETWORK_ISDN 0x04
#define PCI_SUBCLASS_NETWORK_WORLDFIP 0x05
#define PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP 0x06
+#define PCI_SUBCLASS_NETWORK_INFINIBAND 0x07
#define PCI_SUBCLASS_NETWORK_MISC 0x80
/* 0x03 display subclasses */
@@ -210,6 +214,7 @@ typedef u_int8_t pci_revision_t;
#define PCI_SUBCLASS_BRIDGE_RACEWAY 0x08
#define PCI_SUBCLASS_BRIDGE_STPCI 0x09
#define PCI_SUBCLASS_BRIDGE_INFINIBAND 0x0a
+#define PCI_SUBCLASS_BRIDGE_AS 0x0b
#define PCI_SUBCLASS_BRIDGE_MISC 0x80
/* 0x07 communications subclasses */
@@ -228,6 +233,8 @@ typedef u_int8_t pci_revision_t;
#define PCI_SUBCLASS_SYSTEM_RTC 0x03
#define PCI_SUBCLASS_SYSTEM_PCIHOTPLUG 0x04
#define PCI_SUBCLASS_SYSTEM_SDHC 0x05
+#define PCI_SUBCLASS_SYSTEM_IOMMU 0x06
+#define PCI_SUBCLASS_SYSTEM_ROOTCOMPEVENT 0x07
#define PCI_SUBCLASS_SYSTEM_MISC 0x80
/* 0x09 input subclasses */