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authorbrad <brad@openbsd.org>2008-04-01 01:21:20 +0000
committerbrad <brad@openbsd.org>2008-04-01 01:21:20 +0000
commit68179118c5ba8d15748b1bf85f47a751378c139a (patch)
tree30497935c24b5558b97055a23627d7649c60ca45
parentonly need 8 words to learn about i2c spd jc-42.4 sensors (diff)
downloadwireguard-openbsd-68179118c5ba8d15748b1bf85f47a751378c139a.tar.xz
wireguard-openbsd-68179118c5ba8d15748b1bf85f47a751378c139a.zip
Add some defines and remove some of the magic numbers from the code.
From DragonFly ok jsg@
-rw-r--r--sys/dev/mii/etphy.c25
1 files changed, 19 insertions, 6 deletions
diff --git a/sys/dev/mii/etphy.c b/sys/dev/mii/etphy.c
index 9adbf5872d0..4dea1698ea5 100644
--- a/sys/dev/mii/etphy.c
+++ b/sys/dev/mii/etphy.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: etphy.c,v 1.2 2007/11/25 20:28:06 brad Exp $ */
+/* $OpenBSD: etphy.c,v 1.3 2008/04/01 01:21:20 brad Exp $ */
/*
* Copyright (c) 2007 The DragonFly Project. All rights reserved.
@@ -50,9 +50,20 @@
#include <dev/mii/miidevs.h>
#define ETPHY_INDEX 0x10 /* XXX reserved in DS */
+#define ETPHY_INDEX_MAGIC 0x402
#define ETPHY_DATA 0x11 /* XXX reserved in DS */
#define ETPHY_CTRL 0x12
+#define ETPHY_CTRL_DIAG 0x0004
+#define ETPHY_CTRL_RSV1 0x0002 /* XXX reserved */
+#define ETPHY_CTRL_RSV0 0x0001 /* XXX reserved */
+
+#define ETPHY_CONF 0x16
+#define ETPHY_CONF_TXFIFO_MASK 0x3000
+#define ETPHY_CONF_TXFIFO_8 0x0000
+#define ETPHY_CONF_TXFIFO_16 0x1000
+#define ETPHY_CONF_TXFIFO_24 0x2000
+#define ETPHY_CONF_TXFIFO_32 0x3000
#define ETPHY_SR 0x1a
#define ETPHY_SR_SPD_MASK 0x0300
@@ -250,18 +261,20 @@ etphy_reset(struct mii_softc *sc)
PHY_READ(sc, MII_PHYIDR2);
PHY_READ(sc, ETPHY_CTRL);
- PHY_WRITE(sc, ETPHY_CTRL, 0x6);
+ PHY_WRITE(sc, ETPHY_CTRL,
+ ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1);
- PHY_WRITE(sc, ETPHY_INDEX, 0x402);
+ PHY_WRITE(sc, ETPHY_INDEX, ETPHY_INDEX_MAGIC);
PHY_READ(sc, ETPHY_DATA);
- PHY_WRITE(sc, ETPHY_CTRL, 0x2);
+ PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
}
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, ETPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
- PHY_WRITE(sc, ETPHY_CTRL, 0x7);
+ PHY_WRITE(sc, ETPHY_CTRL,
+ ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1 | ETPHY_CTRL_RSV0);
#define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
@@ -280,7 +293,7 @@ etphy_reset(struct mii_softc *sc)
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, ETPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
- PHY_WRITE(sc, ETPHY_CTRL, 0x2);
+ PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
mii_phy_reset(sc);
}