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author | 2019-09-15 15:52:14 +0000 | |
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committer | 2019-09-15 15:52:14 +0000 | |
commit | 6e969c1c47c5e94618a23f789453e1b9ae691bf6 (patch) | |
tree | 60668fa92bb9ad9446cf4b1b72a0e6be6075e422 | |
parent | With the recent fixes to SCSI version detection we reproduced a (diff) | |
download | wireguard-openbsd-6e969c1c47c5e94618a23f789453e1b9ae691bf6.tar.xz wireguard-openbsd-6e969c1c47c5e94618a23f789453e1b9ae691bf6.zip |
Mask all MMC interrupts. This prevents an interrupt storm when one of the
counters reaches the half-way point (i.e. after receiving 2GB of packet
data). Fixes the problem discovered and reported by kurt@
ok jsg@
-rw-r--r-- | sys/dev/ic/dwc_gmac.c | 10 | ||||
-rw-r--r-- | sys/dev/ic/dwc_gmac_reg.h | 6 |
2 files changed, 14 insertions, 2 deletions
diff --git a/sys/dev/ic/dwc_gmac.c b/sys/dev/ic/dwc_gmac.c index 3d19b7439e7..7ee5d91352d 100644 --- a/sys/dev/ic/dwc_gmac.c +++ b/sys/dev/ic/dwc_gmac.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dwc_gmac.c,v 1.11 2018/12/30 20:11:59 kettenis Exp $ */ +/* $OpenBSD: dwc_gmac.c,v 1.12 2019/09/15 15:52:14 kettenis Exp $ */ /* $NetBSD: dwc_gmac.c,v 1.34 2015/08/21 20:12:29 jmcneill Exp $ */ /*- @@ -119,6 +119,8 @@ static uint32_t bitrev32(uint32_t); GMAC_DMA_INT_UNE|GMAC_DMA_INT_OVE| \ GMAC_DMA_INT_TJE) +#define GMAC_DEF_MMC_INT_MASK 0xffffffff + #define AWIN_DEF_MAC_INTRMASK \ (AWIN_GMAC_MAC_INT_TSI | AWIN_GMAC_MAC_INT_ANEG | \ AWIN_GMAC_MAC_INT_LINKCHG | AWIN_GMAC_MAC_INT_RGSMII) @@ -247,6 +249,12 @@ dwc_gmac_attach(struct dwc_gmac_softc *sc, uint32_t mii_clk, int phyloc) AWIN_DEF_MAC_INTRMASK); bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_DMA_INTENABLE, GMAC_DEF_DMA_INT_MASK); + bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MMC_RX_INT_MSK, + GMAC_DEF_MMC_INT_MASK); + bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MMC_TX_INT_MSK, + GMAC_DEF_MMC_INT_MASK); + bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MMC_IPC_INT_MSK, + GMAC_DEF_MMC_INT_MASK); splx(s); return; diff --git a/sys/dev/ic/dwc_gmac_reg.h b/sys/dev/ic/dwc_gmac_reg.h index ed8c139bc1a..ce6ac1162af 100644 --- a/sys/dev/ic/dwc_gmac_reg.h +++ b/sys/dev/ic/dwc_gmac_reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: dwc_gmac_reg.h,v 1.1 2016/08/13 20:35:57 kettenis Exp $ */ +/* $OpenBSD: dwc_gmac_reg.h,v 1.2 2019/09/15 15:52:14 kettenis Exp $ */ /* $NetBSD: dwc_gmac_reg.h,v 1.15 2015/11/21 16:04:11 martin Exp $ */ /*- @@ -81,6 +81,10 @@ #define AWIN_GMAC_MAC_FLOWCTRL_TFE (1 << 1) #define AWIN_GMAC_MAC_FLOWCTRL_BUSY (1 << 0) +#define AWIN_GMAC_MMC_RX_INT_MSK 0x010c +#define AWIN_GMAC_MMC_TX_INT_MSK 0x0110 +#define AWIN_GMAC_MMC_IPC_INT_MSK 0x0200 + #define AWIN_GMAC_DMA_BUSMODE 0x1000 #define AWIN_GMAC_DMA_TXPOLL 0x1004 #define AWIN_GMAC_DMA_RXPOLL 0x1008 |