Move cache handling routines related definitions to a dedicated header file,

rather than abusing <machine/cpu.h>.

14 files changed, 154 insertions, 89 deletions

diff --git a/sys/arch/loongson/loongson/bus_dma.c b/sys/arch/loongson/loongson/bus_dma.c
index 912acb0b585..53f6f5cfe38 100644
--- a/sys/arch/loongson/loongson/bus_dma.c
+++ b/sys/arch/loongson/loongson/bus_dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_dma.c,v 1.8 2012/03/15 18:57:20 miod Exp $ */
+/*	$OpenBSD: bus_dma.c,v 1.9 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -64,6 +64,7 @@
 #include <uvm/uvm_extern.h>
 
 #include <mips64/archtype.h>
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/autoconf.h>
 
@@ -306,9 +307,6 @@ void
 _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
     bus_size_t size, int op)
 {
-#define SYNC_R 0	/* WB invalidate, WT invalidate */
-#define SYNC_W 1	/* WB writeback, WT unaffected */
-#define SYNC_X 2	/* WB writeback + invalidate, WT invalidate */
 	int nsegs;
 	int curseg;
 	int cacheop;
@@ -354,14 +352,14 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
 			 */
 			if (op & BUS_DMASYNC_PREWRITE) {
 				if (op & BUS_DMASYNC_PREREAD)
-					cacheop = SYNC_X;
+					cacheop = CACHE_SYNC_X;
 				else
-					cacheop = SYNC_W;
+					cacheop = CACHE_SYNC_W;
 			} else {
 				if (op & BUS_DMASYNC_PREREAD)
-					cacheop = SYNC_R;
+					cacheop = CACHE_SYNC_R;
 				else if (op & BUS_DMASYNC_POSTREAD)
-					cacheop = SYNC_R;
+					cacheop = CACHE_SYNC_R;
 				else
 					cacheop = -1;
 			}
diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c
index 6b822bf40f2..d0394d8985f 100644
--- a/sys/arch/loongson/loongson/machdep.c
+++ b/sys/arch/loongson/loongson/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.34 2012/03/15 18:57:20 miod Exp $ */
+/*	$OpenBSD: machdep.c,v 1.35 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -70,6 +70,7 @@
 #include <ddb/db_interface.h>
 
 #include <machine/autoconf.h>
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/memconf.h>
 #include <machine/pmon.h>
diff --git a/sys/arch/mips64/include/cache.h b/sys/arch/mips64/include/cache.h
new file mode 100644
index 00000000000..0117918e9d3
--- /dev/null
+++ b/sys/arch/mips64/include/cache.h
@@ -0,0 +1,96 @@
+/*	$OpenBSD: cache.h,v 1.1 2012/03/25 13:52:52 miod Exp $	*/
+
+/*
+ * Copyright (c) 2012 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef	_MIPS64_CACHE_H_
+#define	_MIPS64_CACHE_H_
+
+/*
+ * Declare canonical cache functions for a given processor.
+ *
+ * Note that the uint64_t arguments are addresses, which can be either
+ * virtual or physical addresses, depending upon the particular processor
+ * model.  The high-level functions, invoked from pmap, pass both virtual
+ * and physical addresses to the Mips_* cache macros declared in
+ * <machine/cpu.h>.  It is the responsibility of a given port, when
+ * implementing these macros, to pass either the virtual or the physical
+ * address to the final cache routines.
+ *
+ * Note that there are no ports where the supported processors use a mix
+ * of virtual and physical addresses.
+ */
+
+#define CACHE_PROTOS(chip) \
+/* Figure out cache configuration */ \
+void	chip##_ConfigCache(struct cpu_info *); \
+/* Writeback and invalidate all caches */ \
+void  	chip##_SyncCache(struct cpu_info *); \
+/* Invalidate all I$ for the given range */ \
+void	chip##_InvalidateICache(struct cpu_info *, uint64_t, size_t); \
+/* Writeback all D$ for the given page */ \
+void	chip##_SyncDCachePage(struct cpu_info *, uint64_t); \
+/* Writeback all D$ for the given range */ \
+void	chip##_HitSyncDCache(struct cpu_info *, uint64_t, size_t); \
+/* Invalidate all D$ for the given range */ \
+void	chip##_HitInvalidateDCache(struct cpu_info *, uint64_t, size_t); \
+/* Enforce coherency of the given range */ \
+void	chip##_IOSyncDCache(struct cpu_info *, uint64_t, size_t, int);
+
+/*
+ * Cavium Octeon.
+ * ICache routines take virtual addresses.
+ * DCache routines take physical addresses.
+ */
+CACHE_PROTOS(Octeon);
+
+/*
+ * STC Loongson 2e and 2f.
+ * ICache routines take virtual addresses.
+ * DCache routines take physical addresses.
+ */
+CACHE_PROTOS(Loongson2);
+ 
+/*
+ * MIPS R4000 and R4400.
+ * ICache routines take virtual addresses.
+ * DCache routines take virtual addresses.
+ */
+CACHE_PROTOS(Mips4k);
+
+/*
+ * IDT/QED/PMC-Sierra R5000, RM52xx, RM7xxx, RM9xxx
+ * ICache routines take virtual addresses.
+ * DCache routines take virtual addresses.
+ */
+CACHE_PROTOS(Mips5k);
+
+/*
+ * MIPS/NEC R10000/R120000/R140000/R16000
+ * ICache routines take virtual addresses.
+ * DCache routines take virtual addresses.
+ */
+CACHE_PROTOS(Mips10k);
+
+/*
+ * Values used by the IOSyncDCache routine [which acts as the backend of
+ * bus_dmamap_sync()].
+ */
+#define	CACHE_SYNC_R	0	/* WB invalidate, WT invalidate */
+#define	CACHE_SYNC_W	1	/* WB writeback + invalidate, WT unaffected */
+#define	CACHE_SYNC_X	2	/* WB writeback + invalidate, WT invalidate */
+
+#endif	/* _MIPS64_CACHE_H_ */
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index 118e6a9eb50..5a079b54e11 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.76 2012/03/24 20:10:08 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.77 2012/03/25 13:52:52 miod Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -565,41 +565,6 @@ void	tlb_set_page_mask(uint32_t);
 void	tlb_set_pid(int);
 void	tlb_set_wired(int);
 
-/*
- * Available cache operation routines. See <machine/cpu.h> for more.
- */
-void	Octeon_ConfigCache(struct cpu_info *);
-void	Octeon_SyncCache(struct cpu_info *);
-void	Octeon_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
-void	Octeon_SyncDCachePage(struct cpu_info *, paddr_t);
-void	Octeon_HitSyncDCache(struct cpu_info *, paddr_t, size_t);
-void	Octeon_HitInvalidateDCache(struct cpu_info *, paddr_t, size_t);
-void	Octeon_IOSyncDCache(struct cpu_info *, paddr_t, size_t, int);
-
-void	Loongson2_ConfigCache(struct cpu_info *);
-void	Loongson2_SyncCache(struct cpu_info *);
-void	Loongson2_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
-void	Loongson2_SyncDCachePage(struct cpu_info *, paddr_t);
-void	Loongson2_HitSyncDCache(struct cpu_info *, paddr_t, size_t);
-void	Loongson2_HitInvalidateDCache(struct cpu_info *, paddr_t, size_t);
-void	Loongson2_IOSyncDCache(struct cpu_info *, paddr_t, size_t, int);
-
-void	Mips5k_ConfigCache(struct cpu_info *);
-void	Mips5k_SyncCache(struct cpu_info *);
-void	Mips5k_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
-void	Mips5k_SyncDCachePage(struct cpu_info *, vaddr_t);
-void	Mips5k_HitSyncDCache(struct cpu_info *, vaddr_t, size_t);
-void	Mips5k_HitInvalidateDCache(struct cpu_info *, vaddr_t, size_t);
-void	Mips5k_IOSyncDCache(struct cpu_info *, vaddr_t, size_t, int);
-
-void	Mips10k_ConfigCache(struct cpu_info *);
-void	Mips10k_SyncCache(struct cpu_info *);
-void	Mips10k_InvalidateICache(struct cpu_info *, vaddr_t, size_t);
-void	Mips10k_SyncDCachePage(struct cpu_info *, vaddr_t);
-void	Mips10k_HitSyncDCache(struct cpu_info *, vaddr_t, size_t);
-void	Mips10k_HitInvalidateDCache(struct cpu_info *, vaddr_t, size_t);
-void	Mips10k_IOSyncDCache(struct cpu_info *, vaddr_t, size_t, int);
-
 void	tlb_flush(int);
 void	tlb_flush_addr(vaddr_t);
 void	tlb_write_indexed(int, struct tlb_entry *);
diff --git a/sys/arch/mips64/mips64/cache_octeon.c b/sys/arch/mips64/mips64/cache_octeon.c
index 07107fd1f69..59d53c14b56 100644
--- a/sys/arch/mips64/mips64/cache_octeon.c
+++ b/sys/arch/mips64/mips64/cache_octeon.c
@@ -1,3 +1,4 @@
+/*	$OpenBSD: cache_octeon.c,v 1.3 2012/03/25 13:52:52 miod Exp $	*/
 /*
  * Copyright (c) 2010 Takuya ASADA.
  *
@@ -45,9 +46,10 @@
 
 #include <uvm/uvm_extern.h>
 
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 
-#define SYNC() asm volatile("sync\n")
+#define SYNC() asm volatile("sync\n" ::: "memory")
 #define SYNCI() \
 	asm volatile( \
 		".set push\n" \
@@ -75,37 +77,37 @@ Octeon_SyncCache(struct cpu_info *ci)
 }
 
 void
-Octeon_InvalidateICache(struct cpu_info *ci, vaddr_t addr, size_t len)
+Octeon_InvalidateICache(struct cpu_info *ci, uint64_t va, size_t len)
 {
 	/* A SYNCI flushes the entire icache on OCTEON */
 	SYNCI();
 }
 
 void
-Octeon_SyncDCachePage(struct cpu_info *ci, paddr_t addr)
+Octeon_SyncDCachePage(struct cpu_info *ci, uint64_t pa)
 {
 }
 
 void
-Octeon_HitSyncDCache(struct cpu_info *ci, paddr_t addr, size_t len)
+Octeon_HitSyncDCache(struct cpu_info *ci, uint64_t pa, size_t len)
 {
 }
 
 void
-Octeon_HitInvalidateDCache(struct cpu_info *ci, paddr_t addr, size_t len)
+Octeon_HitInvalidateDCache(struct cpu_info *ci, uint64_t pa, size_t len)
 {
 }
 
 void
-Octeon_IOSyncDCache(struct cpu_info *ci, paddr_t addr, size_t len, int how)
+Octeon_IOSyncDCache(struct cpu_info *ci, uint64_t pa, size_t len, int how)
 {
 	switch (how) {
-		default:
-		case 0:
-			break;
-		case 1: /* writeback */
-		case 2: /* writeback and invalidate */
-			SYNC();
-			break;
+	default:
+	case CACHE_SYNC_R:
+		break;
+	case CACHE_SYNC_W: /* writeback */
+	case CACHE_SYNC_X: /* writeback and invalidate */
+		SYNC();
+		break;
 	}
 }
diff --git a/sys/arch/mips64/mips64/db_machdep.c b/sys/arch/mips64/mips64/db_machdep.c
index 051bf4b8f23..c1ef5938a83 100644
--- a/sys/arch/mips64/mips64/db_machdep.c
+++ b/sys/arch/mips64/mips64/db_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_machdep.c,v 1.32 2010/11/27 19:57:23 miod Exp $ */
+/*	$OpenBSD: db_machdep.c,v 1.33 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 1998-2003 Opsycon AB (www.opsycon.se)
@@ -31,9 +31,11 @@
 #include <sys/proc.h>
 #include <dev/cons.h>
 
+#include <mips64/cache.h>
+
 #include <machine/autoconf.h>
-#include <machine/db_machdep.h>
 #include <machine/cpu.h>
+#include <machine/db_machdep.h>
 #include <machine/mips_opcode.h>
 #include <machine/pte.h>
 #include <machine/frame.h>
diff --git a/sys/arch/mips64/mips64/pmap.c b/sys/arch/mips64/mips64/pmap.c
index 96ebbbe9358..073ea38d623 100644
--- a/sys/arch/mips64/mips64/pmap.c
+++ b/sys/arch/mips64/mips64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.56 2012/03/19 21:56:49 miod Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.57 2012/03/25 13:52:52 miod Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -38,10 +38,11 @@
 #include <sys/shm.h>
 #endif
 
-#include <machine/cpu.h>
+#include <mips64/archtype.h>
+#include <mips64/cache.h>
 #include <machine/autoconf.h>
+#include <machine/cpu.h>
 #include <machine/vmparam.h>
-#include <mips64/archtype.h>
 
 #include <uvm/uvm.h>
 
diff --git a/sys/arch/mips64/mips64/sys_machdep.c b/sys/arch/mips64/mips64/sys_machdep.c
index 930f4b60768..e4e2316a931 100644
--- a/sys/arch/mips64/mips64/sys_machdep.c
+++ b/sys/arch/mips64/mips64/sys_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sys_machdep.c,v 1.5 2010/01/09 23:34:29 miod Exp $	*/
+/*	$OpenBSD: sys_machdep.c,v 1.6 2012/03/25 13:52:52 miod Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -52,6 +52,7 @@
 
 #include <uvm/uvm.h>
 
+#include <mips64/cache.h>
 #include <mips64/sysarch.h>
 
 #include <machine/autoconf.h>
diff --git a/sys/arch/octeon/octeon/bus_dma.c b/sys/arch/octeon/octeon/bus_dma.c
index c5b29beaef2..a0addf3ceee 100644
--- a/sys/arch/octeon/octeon/bus_dma.c
+++ b/sys/arch/octeon/octeon/bus_dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_dma.c,v 1.4 2012/03/15 18:57:22 miod Exp $ */
+/*	$OpenBSD: bus_dma.c,v 1.5 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -64,6 +64,7 @@
 #include <uvm/uvm_extern.h>
 
 #include <mips64/archtype.h>
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/autoconf.h>
 
@@ -306,9 +307,6 @@ void
 _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
     bus_size_t size, int op)
 {
-#define SYNC_R 0	/* WB invalidate, WT invalidate */
-#define SYNC_W 1	/* WB writeback + invalidate, WT unaffected */
-#define SYNC_X 2	/* WB writeback + invalidate, WT invalidate */
 	int nsegs;
 	int curseg;
 	struct cpu_info *ci = curcpu();
@@ -354,21 +352,21 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
 			if (op & BUS_DMASYNC_PREWRITE) {
 #ifdef TGT_COHERENT
 				Mips_IOSyncDCache(ci, vaddr, paddr,
-				    ssize, SYNC_W);
+				    ssize, CACHE_SYNC_W);
 #else
 				if (op & BUS_DMASYNC_PREREAD)
 					Mips_IOSyncDCache(ci, vaddr, paddr,
-					    ssize, SYNC_X);
+					    ssize, CACHE_SYNC_X);
 				else
 					Mips_IOSyncDCache(ci, vaddr, paddr,
-					    ssize, SYNC_W);
+					    ssize, CACHE_SYNC_W);
 #endif
 			} else
 			if (op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD)) {
 #ifdef TGT_COHERENT
 #else
 				Mips_IOSyncDCache(ci, vaddr, paddr,
-				    ssize, SYNC_R);
+				    ssize, CACHE_SYNC_R);
 #endif
 			}
 			size -= ssize;
diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c
index 1c5ab1f26db..15c99f61cbe 100644
--- a/sys/arch/octeon/octeon/machdep.c
+++ b/sys/arch/octeon/octeon/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.16 2012/03/15 18:57:22 miod Exp $ */
+/*	$OpenBSD: machdep.c,v 1.17 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -71,6 +71,7 @@
 #include <ddb/db_interface.h>
 
 #include <machine/autoconf.h>
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/memconf.h>
 
diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
index e9205f8a9c4..b71366edba6 100644
--- a/sys/arch/sgi/include/autoconf.h
+++ b/sys/arch/sgi/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.31 2010/04/06 19:15:26 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.32 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -46,11 +46,11 @@ struct sys_rec {
 
 	/* Published cache operations. */
 	void    (*_SyncCache)(struct cpu_info *);
-	void    (*_InvalidateICache)(struct cpu_info *, vaddr_t, size_t);
-	void    (*_SyncDCachePage)(struct cpu_info *, vaddr_t);
-	void    (*_HitSyncDCache)(struct cpu_info *, vaddr_t, size_t);
-	void    (*_IOSyncDCache)(struct cpu_info *, vaddr_t, size_t, int);
-	void    (*_HitInvalidateDCache)(struct cpu_info *, vaddr_t, size_t);
+	void    (*_InvalidateICache)(struct cpu_info *, uint64_t, size_t);
+	void    (*_SyncDCachePage)(struct cpu_info *, uint64_t);
+	void    (*_HitSyncDCache)(struct cpu_info *, uint64_t, size_t);
+	void    (*_IOSyncDCache)(struct cpu_info *, uint64_t, size_t, int);
+	void    (*_HitInvalidateDCache)(struct cpu_info *, uint64_t, size_t);
 
 	/* Serial console configuration. */
 	struct mips_bus_space console_io;
diff --git a/sys/arch/sgi/sgi/bus_dma.c b/sys/arch/sgi/sgi/bus_dma.c
index 520b9a3139f..ff704442e39 100644
--- a/sys/arch/sgi/sgi/bus_dma.c
+++ b/sys/arch/sgi/sgi/bus_dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus_dma.c,v 1.23 2012/03/15 18:57:22 miod Exp $ */
+/*	$OpenBSD: bus_dma.c,v 1.24 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -64,6 +64,7 @@
 #include <uvm/uvm.h>
 
 #include <mips64/archtype.h>
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/autoconf.h>
 
@@ -306,9 +307,6 @@ void
 _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
     bus_size_t size, int op)
 {
-#define SYNC_R 0	/* WB invalidate, WT invalidate */
-#define SYNC_W 1	/* WB writeback + invalidate, WT unaffected */
-#define SYNC_X 2	/* WB writeback + invalidate, WT invalidate */
 	int nsegs;
 	int curseg;
 	struct cpu_info *ci = curcpu();
@@ -354,21 +352,21 @@ _dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t addr,
 			if (op & BUS_DMASYNC_PREWRITE) {
 #ifdef TGT_COHERENT
 				Mips_IOSyncDCache(ci, vaddr, paddr,
-				    ssize, SYNC_W);
+				    ssize, CACHE_SYNC_W);
 #else
 				if (op & BUS_DMASYNC_PREREAD)
 					Mips_IOSyncDCache(ci, vaddr, paddr,
-					    ssize, SYNC_X);
+					    ssize, CACHE_SYNC_X);
 				else
 					Mips_IOSyncDCache(ci, vaddr, paddr,
-					    ssize, SYNC_W);
+					    ssize, CACHE_SYNC_W);
 #endif
 			} else
 			if (op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD)) {
 #ifdef TGT_COHERENT
 #else
 				Mips_IOSyncDCache(ci, vaddr, paddr,
-				    ssize, SYNC_R);
+				    ssize, CACHE_SYNC_R);
 #endif
 			}
 			size -= ssize;
diff --git a/sys/arch/sgi/sgi/ip30_machdep.c b/sys/arch/sgi/sgi/ip30_machdep.c
index 25b2e42948e..4a2d5dc02e2 100644
--- a/sys/arch/sgi/sgi/ip30_machdep.c
+++ b/sys/arch/sgi/sgi/ip30_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip30_machdep.c,v 1.49 2012/03/16 15:25:05 deraadt Exp $	*/
+/*	$OpenBSD: ip30_machdep.c,v 1.50 2012/03/25 13:52:52 miod Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -28,6 +28,7 @@
 #include <sys/tty.h>
 
 #include <mips64/arcbios.h>
+#include <mips64/cache.h>
 
 #include <machine/autoconf.h>
 #include <machine/bus.h>
diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c
index 4b511712f04..0d4f8811c2a 100644
--- a/sys/arch/sgi/sgi/machdep.c
+++ b/sys/arch/sgi/sgi/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.113 2012/03/15 18:57:22 miod Exp $ */
+/*	$OpenBSD: machdep.c,v 1.114 2012/03/25 13:52:52 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -53,6 +53,7 @@
 #include <machine/db_machdep.h>
 #include <ddb/db_interface.h>
 
+#include <mips64/cache.h>
 #include <machine/cpu.h>
 #include <machine/frame.h>
 #include <machine/autoconf.h>