diff options
author | 2007-07-16 20:21:20 +0000 | |
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committer | 2007-07-16 20:21:20 +0000 | |
commit | 79437bc4a019452c159a067761679340f2045be1 (patch) | |
tree | f78b85fdef63cc2492524965c491bd54edb5861d | |
parent | Change idle_mask to be made of the cop0 SR bits unshifted and the cop0 IC bits (diff) | |
download | wireguard-openbsd-79437bc4a019452c159a067761679340f2045be1.tar.xz wireguard-openbsd-79437bc4a019452c159a067761679340f2045be1.zip |
Do not reenabled interrupts when processing a ddb trap, for bad things may
happen; from NetBSD
-rw-r--r-- | sys/arch/mips64/mips64/trap.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/sys/arch/mips64/mips64/trap.c b/sys/arch/mips64/mips64/trap.c index 78cafb30c45..23bf0317870 100644 --- a/sys/arch/mips64/mips64/trap.c +++ b/sys/arch/mips64/mips64/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.36 2007/05/25 20:47:19 miod Exp $ */ +/* $OpenBSD: trap.c,v 1.37 2007/07/16 20:21:20 miod Exp $ */ /* tracked to 1.23 */ /* @@ -199,12 +199,13 @@ trap(trapframe) * If it was off disable all (splhigh) so we don't accidently * enable it when doing a spllower(). */ -/*XXX do in locore? */ if (trapframe->sr & SR_INT_ENAB) { + if (type != T_BREAK) { #ifndef IMASK_EXTERNAL - updateimask(trapframe->cpl); + updateimask(trapframe->cpl); #endif - enableintr(); + enableintr(); + } } else splhigh(); |